STRUCT DRM_I915_GEM_VM_BIND(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

okay so bestie, welcome to the Kernel API Manual page for struct drm_i915_gem_vm_bind(9) β€” this is the VM_BIND struct and it’s giving address-space main character energy. 🫢✨

πŸŽ€ NAME πŸŽ€

struct drm_i915_gem_vm_bind β€” VA to object mapping to bind. πŸ’…

✨ SYNOPSIS ✨

Here’s the struct, copied exactly, no cap:

struct drm_i915_gem_vm_bind {
    __u32 vm_id;
    __u32 handle;
    __u64 start;
    __u64 offset;
    __u64 length;
    __u64 flags;
  #define I915_GEM_VM_BIND_CAPTURE        (1 << 0);
    struct drm_i915_gem_timeline_fence fence;
    __u64 extensions;
 };

🌟 Members 🌟

  • vm_id β€” VM (address space) id to bind. 🧚
  • handle β€” Object handle. πŸŽ€
  • start β€” Virtual Address start to bind. πŸ“
  • offset β€” Offset in object to bind. πŸŒ€
  • length β€” Length of mapping to bind. πŸ“
  • flags β€” Supported flags are:
    • I915_GEM_VM_BIND_CAPTURE: Capture this mapping in the dump upon GPU error. πŸ’₯
πŸ“ Note that fence carries its own flags.
  • fence β€” Timeline fence for bind completion signaling. ⏱️ Timeline fence is of format struct drm_i915_gem_timeline_fence. It is an out fence, hence using I915_TIMELINE_FENCE_WAIT flag is invalid, and an error will be returned. If I915_TIMELINE_FENCE_SIGNAL flag is not set, then out fence is not requested and binding is completed synchronously.
  • extensions β€” Zero-terminated chain of extensions. 🌈 For future extensions. See struct i915_user_extension.

πŸ’– Description πŸ’–

This structure is passed to the VM_BIND ioctl and specifies the mapping of a GPU virtual address (VA) range to the section of an object that should be bound in the device page table of the specified address space (VM). The VA range specified must be unique (ie., not currently bound) and can be mapped to the whole object or a section of the object (partial binding). Multiple VA mappings can be created to the same section of the object (aliasing). πŸ‘‘

The start, offset and length must be 4K page aligned. However the DG2 has 64K page size for device local memory and has compact page table. On that platform, for binding device local-memory objects, the start, offset and length must be 64K aligned. Also, UMDs should not mix the local memory 64K page and the system memory 4K page bindings in the same 2M range. 🧠✨

Error code -EINVAL will be returned if start, offset and length are not properly aligned. In version 1 (See I915_PARAM_VM_BIND_VERSION), error code -ENOSPC will be returned if the VA range specified can't be reserved. 😭

VM_BIND/UNBIND ioctl calls executed on different CPU threads concurrently are not ordered. Furthermore, parts of the VM_BIND operation can be done asynchronously, if valid fence is specified. ⚑

πŸ”— SEE ALSO πŸ”—


okay that’s the whole page, mwah πŸ’‹ β€” source/version ./Documentation/gpu/rfc, dated October 2026, all about struct drm_i915_gem_vm_bind(9). πŸŽ€πŸŒΈ

πŸ“¦ where this page comes from