STRUCT DPU_VBIF_CFG(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… struct dpu_vbif_cfg(9) β€” Kernel API Manual πŸ’…

πŸ’– NAME πŸ’–

struct dpu_vbif_cfg β€” information of VBIF blocks

✨ SYNOPSIS ✨

okay so here's the exact struct shape, bestie β€” no cap, keep it literal:

struct dpu_vbif_cfg {
    u32 len;
    unsigned long features;
    u32 default_ot_rd_limit;
    u32 default_ot_wr_limit;
    u32 xin_halt_timeout;
    u32 qos_rp_remap_size;
    struct dpu_vbif_dynamic_ot_tbl dynamic_ot_rd_tbl;
    struct dpu_vbif_dynamic_ot_tbl dynamic_ot_wr_tbl;
    struct dpu_vbif_qos_tbl qos_rt_tbl;
    struct dpu_vbif_qos_tbl qos_nrt_tbl;
    u32 memtype_count;
    u32 memtype[MAX_XIN_COUNT];
};

πŸŽ€ Members πŸŽ€

okay so this is the field-by-field vibe check. Every member, no skipping, periodt:

  • len β€” length of hardware block.
  • features β€” bit mask identifying sub-blocks/features.
  • default_ot_rd_limit β€” default OT read limit. (the wrapped Members text also shows ot_rd_limit for this one, so don't let the line break gaslight you πŸ’€)
  • default_ot_wr_limit β€” default OT write limit. (same situation: ot_wr_limit shows up in the wrap, but the struct field is default_ot_wr_limit)
  • xin_halt_timeout β€” maximum time (in usec) for xin to halt.
  • qos_rp_remap_size β€” size of VBIF_XINL_QOS_RP_REMAP register space.
  • dynamic_ot_rd_tbl β€” dynamic OT read configuration table.
  • dynamic_ot_wr_tbl β€” dynamic OT write configuration table.
  • qos_rt_tbl β€” real-time QoS priority table.
  • qos_nrt_tbl β€” non-real-time QoS priority table.
  • memtype_count β€” number of defined memtypes.
  • memtype β€” array of xin memtype definitions. (in the struct it's literally u32 memtype[MAX_XIN_COUNT];)

🌈 SEE ALSO 🌈

the Kernel file is ./drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h, and the linked crew is lowkey iconic β€” fr fr:

  • struct dpu_scaler_blk(9)
  • struct dpu_pp_blk(9)
  • struct dpu_dsc_blk(9)
  • struct dpu_sspp_v13_rec_blk(9)
  • enum dpu_qos_lut_usage(9)
  • struct dpu_qos_lut_entry(9)
  • struct dpu_qos_lut_tbl(9)
  • struct dpu_rotation_cfg(9)
  • struct dpu_caps(9)
  • struct dpu_sspp_sub_blks(9)
  • struct dpu_lm_sub_blks(9)
  • struct dpu_dspp_sub_blks(9)
  • struct dpu_dsc_sub_blks(9)
  • struct dpu_sspp_cfg(9)
  • struct dpu_lm_cfg(9)
  • struct dpu_dspp_cfg(9)
  • struct dpu_pingpong_cfg(9)
  • struct dpu_merge_3d_cfg(9)
  • struct dpu_dsc_cfg(9)
  • struct dpu_intf_cfg(9)
  • struct dpu_wb_cfg(9)
  • struct dpu_vbif_dynamic_ot_cfg(9)
  • struct dpu_vbif_dynamic_ot_tbl(9)
  • struct dpu_vbif_qos_tbl(9)
  • struct dpu_cdm_cfg(9)
  • struct dpu_perf_cdp_cfg(9)
  • struct dpu_mdss_version(9)
  • struct dpu_perf_cfg(9)
  • struct dpu_mdss_cfg(9)

xoxo, this page came from ./drivers/gpu/drm/msm/disp/dpu1, dated October 2026, and it's serving struct dpu_vbif_cfg(9) main character energy β€” slay πŸ’…βœ¨πŸ¦‹

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