STRUCT DPU_PERF_CFG(9)
π struct dpu_perf_cfg(9) β Kernel API Manual π
okay so welcome to the Kernel API Manual, bestie! We're looking at struct dpu_perf_cfg β the performance control settings struct. It's giving "all the knobs for bandwidth, latencies, LUTs, and CDP configs," and we are obsessed. β¨
πΈ NAME πΈ
struct dpu_perf_cfg β performance control settings. Here's the full field roster from the NAME section, with every description kept intact. Yes, the NAME text literally has @min_core_ib twice, and no, I'm not fixing it β facts are facts, bestie π
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@max_bw_lowβ the low threshold of maximum bandwidth, in kbps.@max_bw_highβ the high threshold of maximum bandwidth, in kbps.@min_core_ibβ minimum bandwidth for core, in kbps.@min_core_ibβ yep, same name again: minimum mnoc ib vote, in kbps.@min_llcc_ibβ minimum llcc ib vote, in kbps.@min_dram_ibβ minimum dram ib vote, in kbps.@undersized_prefill_linesβ undersized prefill, in lines.@xtra_prefill_linesβ extra prefill latency, in lines.@dest_scale_prefill_linesβ destination scaler latency, in lines.@macrotile_perfill_linesβ macrotile latency, in lines. (The NAME text saysperfillhere; the struct member saysprefill. Both are exactly as written, no cap.)@yuv_nv12_prefill_linesβ yuv_nv12 latency, in lines.@linear_prefill_linesβ linear latency, in lines.@downscaling_prefill_linesβ downscaling latency, in lines.@amortizable_thesholdβ minimum y position for traffic shaping prefill. (Spelledthesholdin the NAME text; the struct member isamortizable_thresholdwiththreshold. Iconic little typo moment.)@min_prefill_linesβ minimum pipeline latency, in lines.@clk_inefficiency_factorβ DPU src clock inefficiency factor.@bw_inefficiency_factorβ DPU axi bus bw inefficiency factor.
β¨ SYNOPSIS β¨
This is the whole struct, exactly as it appears in the manual:
struct dpu_perf_cfg {
u32 max_bw_low;
u32 max_bw_high;
u32 min_core_ib;
u32 min_llcc_ib;
u32 min_dram_ib;
u32 undersized_prefill_lines;
u32 xtra_prefill_lines;
u32 dest_scale_prefill_lines;
u32 macrotile_prefill_lines;
u32 yuv_nv12_prefill_lines;
u32 linear_prefill_lines;
u32 downscaling_prefill_lines;
u32 amortizable_threshold;
u32 min_prefill_lines;
u32 clk_inefficiency_factor;
u32 bw_inefficiency_factor;
u32 safe_lut_tbl[DPU_QOS_LUT_USAGE_MAX];
u32 danger_lut_tbl[DPU_QOS_LUT_USAGE_MAX];
struct dpu_qos_lut_tbl qos_lut_tbl[DPU_QOS_LUT_USAGE_MAX];
struct dpu_perf_cdp_cfg cdp_cfg[DPU_PERF_CDP_USAGE_MAX];
};
π Members π
safe_lut_tblβ LUT tables for safe signals. π«Άdanger_lut_tblβ LUT tables for danger signals. π₯qos_lut_tblβ LUT tables for QoS signals. πcdp_cfgβ cdp use case configurations. π¦
π SEE ALSO π
Kernel file ./drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h β that's the source file, and the cross-reference friend group is:
struct dpu_scaler_blk(9)struct dpu_pp_blk(9)struct dpu_dsc_blk(9)struct dpu_sspp_v13_rec_blk(9)enum dpu_qos_lut_usage(9)struct dpu_qos_lut_entry(9)struct dpu_qos_lut_tbl(9)struct dpu_rotation_cfg(9)struct dpu_caps(9)struct dpu_sspp_sub_blks(9)struct dpu_lm_sub_blks(9)struct dpu_dspp_sub_blks(9)struct dpu_dsc_sub_blks(9)struct dpu_sspp_cfg(9)struct dpu_lm_cfg(9)struct dpu_dspp_cfg(9)struct dpu_pingpong_cfg(9)struct dpu_merge_3d_cfg(9)struct dpu_dsc_cfg(9)struct dpu_intf_cfg(9)struct dpu_wb_cfg(9)struct dpu_vbif_dynamic_ot_cfg(9)struct dpu_vbif_dynamic_ot_tbl(9)struct dpu_vbif_qos_tbl(9)struct dpu_vbif_cfg(9)struct dpu_cdm_cfg(9)struct dpu_perf_cdp_cfg(9)struct dpu_mdss_version(9)struct dpu_mdss_cfg(9)
okay that's the whole page, bestie β source/version path is ./drivers/gpu/drm/msm/disp/dpu1, the date on this one is October 2026, and the page is struct dpu_perf_cfg(9). bye bestie, go config those perf knobs π
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π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms