STRUCT DPU_LM_SUB_BLKS(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’– NAME πŸ’–

okay bestie, welcome to the struct dpu_lm_sub_blks(9) page from the Kernel API Manual ✨ and it is literally all about struct dpu_lm_sub_blks β€” information of mixer block πŸŽ›οΈπŸ’…


✨ SYNOPSIS ✨

here's the struct in all its glory, no cap:

struct dpu_lm_sub_blks {
        u32 maxblendstages;
        u32 blendstage_base[MAX_BLOCKS];
};

🫢 Members 🫢

  • maxblendstages β€” Max number of blend-stages supported πŸ”₯
  • blendstage_base β€” Blend-stage register base offset πŸŽ€

🌈 SEE ALSO 🌈

Kernel file ./drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h β€” and these icons are all linked up too, iykyk:

  • struct dpu_scaler_blk(9)
  • struct dpu_pp_blk(9)
  • struct dpu_dsc_blk(9)
  • struct dpu_sspp_v13_rec_blk(9)
  • enum dpu_qos_lut_usage(9)
  • struct dpu_qos_lut_entry(9)
  • struct dpu_qos_lut_tbl(9)
  • struct dpu_rotation_cfg(9)
  • struct dpu_caps(9)
  • struct dpu_sspp_sub_blks(9)
  • struct dpu_dspp_sub_blks(9)
  • struct dpu_dsc_sub_blks(9)
  • struct dpu_sspp_cfg(9)
  • struct dpu_lm_cfg(9)
  • struct dpu_dspp_cfg(9)
  • struct dpu_pingpong_cfg(9)
  • struct dpu_merge_3d_cfg(9)
  • struct dpu_dsc_cfg(9)
  • struct dpu_intf_cfg(9)
  • struct dpu_wb_cfg(9)
  • struct dpu_vbif_dynamic_ot_cfg(9)
  • struct dpu_vbif_dynamic_ot_tbl(9)
  • struct dpu_vbif_qos_tbl(9)
  • struct dpu_vbif_cfg(9)
  • struct dpu_cdm_cfg(9)
  • struct dpu_perf_cdp_cfg(9)
  • struct dpu_mdss_version(9)
  • struct dpu_perf_cfg(9)
  • struct dpu_mdss_cfg(9)

and that's the whole vibe bestie πŸ¦‹ this page is struct dpu_lm_sub_blks(9), from ./drivers/gpu/drm/msm/disp/dpu1, dated October 2026 β€” mwah πŸ’‹βœ¨

πŸ“¦ where this page comes from