STRUCT DPU_HW_TEAR_CHECK(9)
๐ struct dpu_hw_tear_check(9) ๐
okay bestie, welcome to the Kernel API Manual โ yes, that's the manual name, we're being fancy today ๐ this page is about struct dpu_hw_tear_check, and it's lowkey an icon.
โจ NAME โจ
struct dpu_hw_tear_check โ a struct that literally just holds parameters for configuring the tear-effect module ๐ฆ and no, it doesn't do anything by itself, it's a vibe holder. It's the struct used to configure the tear-check logic, and that logic lives either in the ping-pong module or in the interface module. iykyk โจ
๐ธ SYNOPSIS ๐ธ
here's the whole thing, character for character, no cap:
struct dpu_hw_tear_check {
u32 vsync_count;
u32 sync_cfg_height;
u32 vsync_init_val;
u32 sync_threshold_start;
u32 sync_threshold_continue;
u32 start_pos;
u32 rd_ptr_irq;
u8 hw_vsync_mode;
};
look at her. seven u32s and one little u8 carrying the whole hw_vsync_mode situation. main character energy fr fr ๐
๐ซถ Members ๐ซถ
okay so every field got a job and every job matters, let's go one by one ๐
vsync_countโ the ratio of the MDP VSYNC clk freq (in Hz) to the refresh rate, and then all that gets divided by the no of lines. math girlie behavior, we respect it ๐งฎsync_cfg_heightโ total vertical lines, and it's the display height minus 1. so like,display height - 1. don't forget the minus one bestie ๐ญvsync_init_valโ the init value that the read pointer gets loaded with at the vsync edge. that's where it starts, that's where it vibes ๐ธsync_threshold_startโ the read pointer threshold start ROI, used for the write operation. ROI here is the threshold start region, not "return on investment" (though honestly same energy ๐ )sync_threshold_continueโ the minimum number of lines the write pointer needs to be above the read pointer. minimum. lines. above. periodt โญstart_posโ the position from which thestart_thresholdvalue is added. yes,start_thresholdwith an underscore, that's what the page says, we copy exactly ๐rd_ptr_irqโ the read pointer line at which the interrupt has to be generated. when the pointer hits this line, it's interrupt o'clock ๐ฅhw_vsync_modeโ sync with the external frame sync input. that's the whole note. external. frame. sync. input. ๐
๐ SEE ALSO ๐
- the kernel file
./drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.hโ go read it, it's literally right there ๐ฆ - enum
dpu_3d_blend_mode(9) struct dpu_hw_fmt_layout(9)struct dpu_mdss_color(9)struct dpu_hw_pp_vsync_info(9)
go read them all, bestie, you'll be so smart ๐
๐ real talk though: this page is a struct definition page โ nothing here is deprecated, dangerous, or undefined, it's just fields. but you do have to fill them correctly or the tear-check logic is gonna have a bad time. ๐
okay that's the whole page, mwah ๐ this came from the kernel docs out of ./drivers/gpu/drm/msm/disp/dpu1, dated October 2026, and the manual calls her struct dpu_hw_tear_check(9) โ slay, bye ๐โจ๐
๐ฆ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- ๐ girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms