STRUCT DPU_HW_PP_VSYNC_INFO(9)

✨ struct dpu_hw_pp_vsync_info(9) ✨

okay so bestie, welcome to the Kernel API Manual 💅 and honestly? this one's a little struct with a big job. buckle up 🎀

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🌸 NAME 🌸

struct dpu_hw_pp_vsync_info — a struct that literally just holds the parameters you need to configure the read and write pointers for command mode panels 🦋 no cap, that's the whole vibe.

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🫶 SYNOPSIS 🫶

struct dpu_hw_pp_vsync_info {
    u32 rd_ptr_init_val;
    u32 rd_ptr_frame_count;
    u32 rd_ptr_line_count;
    u32 wr_ptr_line_count;
    u32 intf_frame_count;
 };

look at her. five u32 fields, all iconic, all necessary 👑

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💖 Members 💖

• rd_ptr_init_val — the value of the rd pointer at the vsync edge ✨ that's it, that's the field.
• rd_ptr_frame_count — how many frames have been sent since the interface got enabled 🌈 counting era fr fr.
• rd_ptr_line_count — the current line on the panel (that's the rd ptr, bestie) 🎀
• wr_ptr_line_count — the current line within the pp fifo (and that one's the wr ptr) 🧚
• intf_frame_count — frames read from intf 👑 keeping tally, main character energy.

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🔥 SEE ALSO 🔥

• Kernel file ./drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h — go read her, iykyk 📖
• enum dpu_3d_blend_mode(9)
• struct dpu_hw_fmt_layout(9)
• struct dpu_mdss_color(9)
• struct dpu_hw_tear_check(9)

all the besties in the same friend group 🫶

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ngl this page is short and sweet, but every field matters — don't skip a single u32 💀

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and that's the whole page, bestie ✨ mwah 💋 — sourced straight from ./drivers/gpu/drm/msm/disp/dpu1, dated October 2026, and yes the manual name really is Kernel API Manual. periodt. 💜