STRUCT DPU_ENCODER_PHYS_OPS(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… struct dpu_encoder_phys_ops(9) β€” Kernel API Manual ✨

okay bestie, welcome to struct dpu_encoder_phys_ops, aka the glow-up of the whole kernel API Manual situation πŸ’– this is literally the interface the physical encoders hand to the virtual encoder that contains them β€” it's giving "here's everything I can do for you, queen" 🫢


🌸 NAME

struct dpu_encoder_phys_ops β€” the interface the physical encoders provide to the containing virtual encoder. that's it, that's the vibe ✨


πŸ¦‹ SYNOPSIS

struct dpu_encoder_phys_ops {
    void (*prepare_commit)(struct dpu_encoder_phys *encoder);
    bool (*is_master)(struct dpu_encoder_phys *encoder);
    void (*atomic_mode_set)(struct dpu_encoder_phys *encoder, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state);
    void (*enable)(struct dpu_encoder_phys *encoder);
    void (*disable)(struct dpu_encoder_phys *encoder);
    int (*control_vblank_irq)(struct dpu_encoder_phys *enc, bool enable);
    int (*wait_for_commit_done)(struct dpu_encoder_phys *phys_enc);
    int (*wait_for_tx_complete)(struct dpu_encoder_phys *phys_enc);
    void (*prepare_for_kickoff)(struct dpu_encoder_phys *phys_enc);
    void (*handle_post_kickoff)(struct dpu_encoder_phys *phys_enc);
    void (*trigger_start)(struct dpu_encoder_phys *phys_enc);
    bool (*needs_single_flush)(struct dpu_encoder_phys *phys_enc);
    void (*irq_enable)(struct dpu_encoder_phys *phys);
    void (*irq_disable)(struct dpu_encoder_phys *phys);
    void (*prepare_idle_pc)(struct dpu_encoder_phys *phys_enc);
    void (*restore)(struct dpu_encoder_phys *phys);
    int (*get_line_count)(struct dpu_encoder_phys *phys);
    int (*get_frame_count)(struct dpu_encoder_phys *phys);
    void (*prepare_wb_job)(struct dpu_encoder_phys *phys_enc, struct drm_writeback_job *job);
    void (*cleanup_wb_job)(struct dpu_encoder_phys *phys_enc, struct drm_writeback_job *job);
    bool (*is_valid_for_commit)(struct dpu_encoder_phys *phys_enc);
};

like, look at all those function pointers πŸ‘‘ twenty-one of them, and not one is filler. main character struct fr fr.


πŸŽ€ Members

  • prepare_commit β€” MSM Atomic Call, start of the atomic commit sequence πŸ’« it's the opening number, the first thing that happens before the whole commit dance kicks off.
  • is_master β€” whether this phys_enc is the current master encoder. and yes she can be switched at enable time πŸ”„ it's based on split_role and the current mode (CMD/VID), so the crown can absolutely change hands, iykyk.
  • atomic_mode_set β€” DRM Call. sets a DRM mode πŸ’… and it likely caches the mode, for use at enable β€” so it's basically stashing the fit for later, no cap.
  • enable β€” DRM Call. enables a DRM mode ✨ the moment everything turns tf on.
  • disable β€” DRM Call. disables the mode 😭 we simply must say goodbye.
  • control_vblank_irq β€” Register/Deregister for VBLANK IRQ ⚑ flip it on, flip it off, we love a toggle.
  • wait_for_commit_done β€” wait for the hardware to have flushed the current pending frames to hardware ⏳ patience is a virtue bestie.
  • wait_for_tx_complete β€” wait for the hardware to transfer the pixels to the panel πŸ–ΌοΈ like, the pixels are literally on their way, just let them land.
  • prepare_for_kickoff β€” do any work necessary prior to a kickoff 🏈 for the CMD encoder, it may wait for the previous tx done β€” so yes, it can genuinely sit there waiting.
  • handle_post_kickoff β€” do any work necessary post-kickoff work 🎬 the afterparty cleanup.
  • trigger_start β€” process the start event on the physical encoder 🚦 things are officially beginning.
  • needs_single_flush β€” whether the encoder slaves need to be flushed 🌊 one flush, or not? that's the question.
  • irq_enable β€” handler to enable all the encoder IRQs πŸ”” all of them. every single one. go off.
  • irq_disable β€” handler to disable all the encoder IRQs πŸ”• and now silence, iconic.
  • prepare_idle_pc β€” the phys encoder can update the vsync_enable status on idle power collapse prepare 😴 lowkey the "getting ready for a nap" function.
  • restore β€” restore all the encoder configs 🧚 everything back to how it was, we love a comeback.
  • get_line_count β€” obtain the current vertical line count πŸ“ just reading the room, vertically.
  • get_frame_count β€” πŸ™ˆ this page doesn't give it a description, but she's in the struct up there and she's valid, okurrr.
  • prepare_wb_job β€” 😭 again, no description on this page β€” but it takes a struct drm_writeback_job *job, and it's in the synopsis, so it counts.
  • cleanup_wb_job β€” πŸ’€ same situation bestie: no blurb here, just a struct drm_writeback_job *job and good intentions.
  • is_valid_for_commit β€” ✨ no description given, but the name is doing a lot of heavy lifting and honestly? slay.
real talk πŸ’–: get_frame_count, prepare_wb_job, cleanup_wb_job and is_valid_for_commit live in the struct but this page doesn't spell out a description for them β€” so don't go making stuff up about what they do, mkay? the facts stay the facts.

πŸ”₯ SEE ALSO

Kernel file ./drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h plus the whole friend group πŸ‘‘:

  • enum dpu_enc_split_role(9)
  • enum dpu_enc_enable_state(9)
  • enum dpu_intr_idx(9)
  • struct dpu_encoder_phys(9)
  • struct dpu_encoder_phys_wb(9)
  • struct dpu_encoder_phys_cmd(9)
  • struct dpu_enc_phys_init_params(9)

and that's the whole page, bestie 🫢 this one came from ./drivers/gpu/drm/msm/disp/dpu1, dated October 2026, and it's filed as struct dpu_encoder_phys_ops(9) β€” go forth and read the source, it's giving required reading πŸ’œ

πŸ“¦ where this page comes from