STRUCT DPU_ENCODER_PHYS_CMD(9)

✨ struct dpu_encoder_phys_cmd(9) ✨

okay bestie, so this is the Kernel API Manual page for struct dpu_encoder_phys_cmd — literally the whole glow-up guide to this one struct, and I'm gonna walk you through it like we're texting at 2am 🫶

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🎀 NAME 🎀

struct dpu_encoder_phys_cmd — it's a sub-class of dpu_encoder_phys (yes, the parent class, iconic family dynamic 💅) and its whole job is handling command mode specific operations. That's the vibe. That's the assignment. No cap.

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🌸 SYNOPSIS 🌸

here's the struct in all her main character glory — copy it exactly, bestie, don't you dare retype it from memory:

struct dpu_encoder_phys_cmd {
    struct dpu_encoder_phys base;
    int stream_sel;
    bool serialize_wait4pp;
    int pp_timeout_report_cnt;
    atomic_t pending_vblank_cnt;
    wait_queue_head_t pending_vblank_wq;
 };

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🦋 Members 🦋

okay so let's meet the cast, one member at a time — each one gets their little intro paragraph:

• base — the baseclass physical encoder structure. she's the foundation, the blueprint, the parent class doing parent class things 👑
• stream_sel — stream selection for multi-stream interfaces. pick your stream, babe, it's giving "choose your fighter" 🌈
• serialize_wait4pp — this one's the serialize_wait4pp feature flag, and lowkey the way it works is: it waits for the pp_done interrupt after ctl_start instead of before next frame kickoff. that ordering detail is the whole point, don't mix it up fr fr
• pp_timeout_report_cnt — the number of pingpong done irq timeout errors. yeah. it's a counter. it's counting the oopsies 😭
• pending_vblank_cnt — an atomic counter tracking the pending wait for VBLANK. atomic, bestie, so it's safe out here 🧚
• pending_vblank_wq — the wait queue for blocking until VBLANK is received. she'll hold you there until the vblank shows up, patient queen 💜

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⭐ SEE ALSO ⭐

the required-reading list, the group chat members you should also be following:

• Kernel file ./drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h
• enum dpu_enc_split_role(9)
• enum dpu_enc_enable_state(9)
• struct dpu_encoder_phys_ops(9)
• enum dpu_intr_idx(9)
• struct dpu_encoder_phys(9)
• struct dpu_encoder_phys_wb(9)
• struct dpu_enc_phys_init_params(9)

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ngl if you're digging through this struct you're probably deep in DPU encoder land — go read the whole header file, it's right there in ./drivers/gpu/drm/msm/disp/dpu1 💖

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and that's the whole page, bestie!! 💅✨ this one's living in ./drivers/gpu/drm/msm/disp/dpu1, and it's dated October 2026 — so like, future queen behavior honestly 🎀👑 mwah, go read your headers, ily, bye 🦋