STRUCT DPU_ENCODER_PHYS(9)

💅 struct dpu_encoder_phys(9)

okay so bestie, this is the struct dpu_encoder_phys — the physical encoder that drives a single INTF block tied to a specific panel / sub-panel. it's an abstract type, meaning it gets sub-classed by phys_vid or phys_cmd for video mode or command mode encs respectively. basically it's the blueprint, not the building, iykyk 🎀

✨ SYNOPSIS ✨

struct dpu_encoder_phys {
    struct drm_encoder *parent;
    struct dpu_encoder_phys_ops ops;
    struct dpu_hw_mdp *hw_mdptop;
    struct dpu_hw_ctl *hw_ctl;
    struct dpu_hw_pingpong *hw_pp;
    struct dpu_hw_intf *hw_intf;
    struct dpu_hw_wb *hw_wb;
    struct dpu_hw_cdm *hw_cdm;
    struct dpu_kms *dpu_kms;
    struct dpu_hw_cdm_cfg cdm_cfg;
    struct drm_display_mode cached_mode;
    struct mutex vblank_ctl_lock;
    enum dpu_enc_split_role split_role;
    enum dpu_intf_mode intf_mode;
    spinlock_t *enc_spinlock;
    enum dpu_enc_enable_state enable_state;
    int vblank_refcount;
    atomic_t vsync_cnt;
    atomic_t underrun_cnt;
    atomic_t pending_ctlstart_cnt;
    atomic_t pending_kickoff_cnt;
    wait_queue_head_t pending_kickoff_wq;
    unsigned int irq[INTR_IDX_MAX];
    bool has_intf_te;
};

🌸 MEMBERS 🌸

like, every single field, no skips, we're doing the full tour 🫶

• parent — pointer to the containing virtual encoder. the parent, if you will 💖
• ops — the operations exposed to the virtual encoder. this is the whole API vibe.
• hw_mdptop — hardware interface to the top registers ✨
• hw_ctl — hardware interface to the ctl registers
• hw_pp — hardware interface to the ping pong registers 🏓
• hw_intf — hardware interface to the intf registers
• hw_wb — hardware interface to the wb registers
• hw_cdm — hardware interface to the CDM registers
• dpu_kms — pointer to the dpu_kms top level. main character of the whole file ngl 👑
• cdm_cfg — CDM block config needed to store WB/DP block's CDM configuration
• cached_mode — DRM mode cached at mode_set time, acted on in enable. it's giving "remember it now, use it later" 💅
• vblank_ctl_lock — Vblank ctl mutex lock to protect vblank_refcount. do NOT let the refcount out without it 🔒
• split_role — role to play in a split-panel configuration
• intf_mode — interface mode
• enc_spinlock — Virtual-Encoder-Wide Spin Lock for IRQ purposes 🔥
• enable_state — enable state tracking. keeping receipts, fr fr
• vblank_refcount — reference count of vblank request
• vsync_cnt — Vsync count for the physical encoder
• underrun_cnt — Underrun count for the physical encoder 😭 (we track the sad stuff too)
• pending_ctlstart_cnt — atomic counter tracking the number of ctl start pending.
• pending_kickoff_cnt — atomic counter tracking the number of kickoffs vs. the number of done/vblank irqs. should hover between 0-2. incremented when a new kickoff is scheduled. decremented in irq handler. literally living in the 0-to-2 range, that's its whole personality ⭐
• pending_kickoff_wq — wait queue for blocking until kickoff completes. the "hold on, we're not done yet" energy 🙈
• irq — IRQ indices
• has_intf_te — interface TE configuration support

🦋 SEE ALSO 🦋

kernel file ./drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h — and go read up on enum dpu_enc_split_role(9), enum dpu_enc_enable_state(9), struct dpu_encoder_phys_ops(9), enum dpu_intr_idx(9), struct dpu_encoder_phys_wb(9), struct dpu_encoder_phys_cmd(9), and struct dpu_enc_phys_init_params(9). the whole friend group, you'll love them 💜

ok that's the whole page, no notes 💀 every field accounted for, nothing invented, periodt.

so yeah — this lives in ./drivers/gpu/drm/msm/disp/dpu1, dated October 2026, and it's titled struct dpu_encoder_phys(9) if you ever need to cite it in the group chat 🌈✨ mwah, go read the header file bestie 🍓