STRUCT DPU_DRM_SCALER_V2(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… struct dpu_drm_scaler_v2

okay bestie, welcome to the manual page for struct dpu_drm_scaler_v2 β€” that's the kernel API manual, and this cutie is literally version 2 of struct dpu_drm_scaler. glow-up complete, no cap ✨


πŸ¦‹ NAME

struct dpu_drm_scaler_v2 β€” version 2 of struct dpu_drm_scaler, fr fr. this is the sequel and it ate πŸ’…


✨ SYNOPSIS

struct dpu_drm_scaler_v2 {
    uint32_t enable;
    uint32_t dir_en;
    struct dpu_drm_pix_ext_v1 pe;
    uint32_t horz_decimate;
    uint32_t vert_decimate;
    int32_t init_phase_x[DPU_MAX_PLANES];
    int32_t phase_step_x[DPU_MAX_PLANES];
    int32_t init_phase_y[DPU_MAX_PLANES];
    int32_t phase_step_y[DPU_MAX_PLANES];
    uint32_t preload_x[DPU_MAX_PLANES];
    uint32_t preload_y[DPU_MAX_PLANES];
    uint32_t src_width[DPU_MAX_PLANES];
    uint32_t src_height[DPU_MAX_PLANES];
    uint32_t dst_width;
    uint32_t dst_height;
    uint32_t y_rgb_filter_cfg;
    uint32_t uv_filter_cfg;
    uint32_t alpha_filter_cfg;
    uint32_t blend_cfg;
    uint32_t lut_flag;
    uint32_t dir_lut_idx;
    uint32_t y_rgb_cir_lut_idx;
    uint32_t uv_cir_lut_idx;
    uint32_t y_rgb_sep_lut_idx;
    uint32_t uv_sep_lut_idx;
    struct dpu_drm_de_v1 de;
};

like, look at all those fields. she's got range πŸŽ€


🌸 Members

so here's the whole roster, member by member β€” every single one, because we do not skip anybody in this group chat 🫢

  • enable β€” Scaler enable. the on/off switch, the vibe check for the whole scaler πŸ‘‘
  • dir_en β€” Detail enhancer enable. turns the detail enhancer on ✨
  • pe β€” Pixel extension settings. she's a struct dpu_drm_pix_ext_v1 and she's doing her thing πŸ’–
  • horz_decimate β€” Horizontal decimation factor. horizontal-ness, reduced πŸ¦‹
  • vert_decimate β€” Vertical decimation factor. same energy but vertical, iykyk
  • init_phase_x β€” Initial scaler phase values for x. phase one: x 🌈
  • phase_step_x β€” Phase step values for x. how x moves, literally
  • init_phase_y β€” Initial scaler phase values for y. and now y, periodt
  • phase_step_y β€” Phase step values for y. y's step era πŸ’«
  • preload_x β€” Horizontal preload value. preloaded, horizontal, iconic
  • preload_y β€” Vertical preload value. preloaded, vertical, also iconic
  • src_width β€” Source width. where it's coming from, width-wise πŸ“
  • src_height β€” Source height. where it's coming from, height-wise
  • dst_width β€” Destination width. where it's going, width-wise
  • dst_height β€” Destination height. where it's going, height-wise
  • y_rgb_filter_cfg β€” Y/RGB plane filter configuration. y/rgb getting its own filter config, as she deserves πŸŽ€
  • uv_filter_cfg β€” UV plane filter configuration. uv's turn πŸ’œ
  • alpha_filter_cfg β€” Alpha filter configuration. alpha filter, configured
  • blend_cfg β€” Selection of blend coefficients. picking which blend coefficients, very main character
  • lut_flag β€” LUT configuration flags. flags! for the LUT config! 🚩
  • dir_lut_idx β€” 2d 4x4 LUT index. yeah, 2d, 4x4, that one
  • y_rgb_cir_lut_idx β€” Y/RGB circular LUT index. circular, y/rgb, indexed πŸ’…
  • uv_cir_lut_idx β€” UV circular LUT index. circular, uv, indexed
  • y_rgb_sep_lut_idx β€” Y/RGB separable LUT index. separable this time πŸ¦‹
  • uv_sep_lut_idx β€” UV separable LUT index. separable, uv, final boss of the LUT indices
  • de β€” Detail enhancer settings. she's a struct dpu_drm_de_v1 and she's the last field, going out on a high note πŸ”₯

πŸ‘€ SEE ALSO

Kernel file ./drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h β€” go read the actual source bestie:

  • struct dpu_hw_blk(9)
  • struct dpu_hw_scaler3_de_cfg(9)
  • struct dpu_hw_scaler3_cfg(9)
  • struct dpu_drm_pix_ext_v1(9)
  • struct dpu_drm_de_v1(9)
  • struct dpu_hw_qos_cfg(9)

πŸ’€ friendly reminder from your girl: everything above the sign-off is exactly the struct as it lives in ./drivers/gpu/drm/msm/disp/dpu1. don't go renaming fields on me, the compiler will simply pass away.

and that's the page!! source lives at ./drivers/gpu/drm/msm/disp/dpu1, dated October 2026, and yes this whole thing is struct dpu_drm_scaler_v2(9) β€” mwah, bye bestie πŸ’–πŸ¦‹πŸŽ€

πŸ“¦ where this page comes from