STRUCT DMUB_CURSOR_OFFLOAD_PIPE_DATA_DCN60_V1(9)

💖 struct dmub_cursor_offload_pipe_data_dcn60_v1(9) — Kernel API Manual

okay so bestie, welcome to the Kernel API Manual page for struct dmub_cursor_offload_pipe_data_dcn60_v1(9). It’s giving very specific display-core struct energy, and we’re gonna keep every bit of it intact. No cap.

🎀 NAME

struct dmub_cursor_offload_pipe_data_dcn60_v1 — DCN60 per pipe data. That’s the name, that’s the description, and that’s the whole vibe.

✨ SYNOPSIS

Here’s the struct in all its bitfield glory, bestie. Copy it exactly — same names, same widths, same reserved arrays, same line-wrap weirdness, same comma after CM_CUR0_CURSOR0_FP_SCALE_BIAS_G_Y__CUR0_FP_SCALE_G_Y. Do not “fix” it, do not merge it, do not improvise. Periodt.

struct dmub_cursor_offload_pipe_data_dcn60_v1 {
    uint32_t CURSOR0_0_CURSOR_SURFACE_ADDRESS;
    uint32_t CURSOR0_0_CURSOR_SURFACE_ADDRESS_HIGH;
    uint32_t CURSOR0_0_CURSOR_SIZE__CURSOR_WIDTH : 16;
    uint32_t CURSOR0_0_CURSOR_SIZE__CURSOR_HEIGHT : 16;
    uint32_t CURSOR0_0_CURSOR_POSITION__CURSOR_X_POSITION : 16;
    uint32_t CURSOR0_0_CURSOR_POSITION__CURSOR_Y_POSITION : 16;
    uint32_t CURSOR0_0_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_X : 16;
    uint32_t CURSOR0_0_CURSOR_HOT_SPOT__CURSOR_HOT_SPOT_Y : 16;
    uint32_t CURSOR0_0_CURSOR_DST_OFFSET__CURSOR_DST_X_OFFSET : 13;
    uint32_t CURSOR0_0_CURSOR_CONTROL__CURSOR_ENABLE : 1;
    uint32_t CURSOR0_0_CURSOR_CONTROL__CURSOR_MODE : 3;
    uint32_t CURSOR0_0_CURSOR_CONTROL__CURSOR_2X_MAGNIFY : 1;
    uint32_t CURSOR0_0_CURSOR_CONTROL__CURSOR_PITCH : 2;
    uint32_t CURSOR0_0_CURSOR_CONTROL__CURSOR_LINES_PER_CHUNK : 5;
    uint32_t reserved0[4];
    uint32_t CM_CUR0_CURSOR0_CONTROL__CUR0_ENABLE : 1;
    uint32_t CM_CUR0_CURSOR0_CONTROL__CUR0_MODE : 3;
    uint32_t CM_CUR0_CURSOR0_CONTROL__CUR0_EXPANSION_MODE : 1;
    uint32_t CM_CUR0_CURSOR0_CONTROL__CUR0_ROM_EN : 1;
    uint32_t CM_CUR0_CURSOR0_COLOR0__CUR0_COLOR0 : 24;
    uint32_t CM_CUR0_CURSOR0_COLOR1__CUR0_COLOR1 : 24;
    uint32_t CM_CUR0_CURSOR0_FP_SCALE_BIAS_G_Y__CUR0_FP_BIAS_G_Y : 16;
    uint32_t CM_CUR0_CURSOR0_FP_SCALE_BIAS_G_Y__CUR0_FP_SCALE_G_Y, : 16;
    uint32_t CM_CUR0_CURSOR0_FP_SCALE_BIAS_RB_CRCB__CUR0_FP_BIAS_RB_CRCB
        : 16;
    uint32_t
        CM_CUR0_CURSOR0_FP_SCALE_BIAS_RB_CRCB__CUR0_FP_SCALE_RB_CRCB : 16;
    uint32_t reserved1[4];
    uint32_t HUBPREQ0_CURSOR_SETTINGS__CURSOR0_DST_Y_OFFSET : 8;
    uint32_t HUBPREQ0_CURSOR_SETTINGS__CURSOR0_CHUNK_HDL_ADJUST : 8;
    uint32_t HUBPREQ0_CURSOR_SETTINGS__FORCE_CURSOR_TO_DISP_PREF : 1;
    uint32_t reserved2[3];
};

🫶 Members

ngl, this page’s Members section is empty — there are no member descriptions listed here before it slides straight into SEE ALSO. The struct fields above are still the main characters, obviously. 💅

👀 SEE ALSO

First up, the kernel file: ./drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h. Then the full cross-ref squad, all of them, in order:

• union dmub_addr(9)
• struct dmub_cursor_offload_pipe_data_dcn30_v1(9)
• struct dmub_cursor_offload_pipe_data_dcn401_v1(9)
• struct dmub_cursor_offload_pipe_data_v1(9)
• struct dmub_cursor_offload_payload_data_v1(9)
• struct dmub_cursor_offload_stream_v1(9)
• struct dmub_cursor_offload_v1(9)
• union dmub_fw_meta_feature_bits(9)
• struct dmub_fw_meta_info(9)
• union dmub_fw_meta(9)
• struct dmcub_trace_buf_entry(9)
• union dmub_fw_boot_status(9)
• enum dmub_fw_boot_status_bit(9)
• enum dmub_cursor_offload_comand_type(9)
• union dmub_fw_boot_options(9)
• enum dmub_shared_state_feature_id(9)
• struct dmub_shared_state_ips_fw(9)
• struct dmub_shared_state_ips_driver(9)
• struct dmub_shared_state_cursor_offload_v1(9)
• struct dmub_shared_state_feature_block(9)
• union dmub_gpint_data_register(9)
• enum dmub_out_cmd_type(9)
• struct dmub_cmd_header(9)
• struct dmub_rb_cmd_common(9)
• struct dmub_cmd_PLAT_54186_wa(9)
• struct dmub_rb_cmd_PLAT_54186_wa(9)
• enum dmub_cmd_mall_type(9)
• struct dmub_rb_cmd_mall(9)
• enum dmub_cmd_cab_type(9)
• struct dmub_rb_cmd_cab_for_ss(9)
• enum dmub_fams2_allow_delay_check_mode(9)
• enum dmub_cmd_idle_opt_type(9)
• struct dmub_rb_cmd_idle_opt_dcn_restore(9)
• struct dmub_dcn_notify_idle_cntl_data(9)
• struct dmub_rb_cmd_idle_opt_dcn_notify_idle(9)
• enum dmub_idle_opt_dc_power_state(9)
• struct dmub_idle_opt_set_dc_power_state_data(9)
• struct dmub_rb_cmd_idle_opt_set_dc_power_state(9)
• struct dmub_clocks(9)
• enum dmub_cmd_clk_mgr_type(9)
• struct dmub_rb_cmd_clk_mgr_notify_clocks(9)
• struct dmub_cmd_digx_encoder_control_data(9)
• struct dmub_rb_cmd_digx_encoder_control(9)
• struct dmub_cmd_set_pixel_clock_data(9)
• struct dmub_cmd_enable_disp_power_gating_data(9)
• struct dmub_rb_cmd_enable_disp_power_gating(9)
• struct dmub_dig_transmitter_control_data_v1_7(9)
• union dmub_cmd_dig1_transmitter_control_data(9)
• struct dmub_rb_cmd_dig1_transmitter_control(9)
• struct dmub_rb_cmd_domain_control_data(9)
• struct dmub_rb_cmd_domain_control(9)
• struct dmub_rb_cmd_dpphy_init(9)
• enum dp_aux_request_action(9)
• enum aux_return_code_type(9)
• enum aux_channel_type(9)
• struct aux_transaction_parameters(9)
• struct dmub_rb_cmd_hpd_sense_notify(9)
• enum dmub_phy_fsm_state(9)
• enum dmub_abm_ace_curve_type(9)
• enum dmub_abm_histogram_type(9)
• enum dmub_cmd_panel_cntl_type(9)
• struct dmub_cmd_panel_cntl_data(9)
• struct dmub_rb_cmd_panel_cntl(9)
• struct dmub_cmd_cable_id_input(9)
• struct dmub_cmd_cursor_offload_init_data(9)
• struct dmub_rb_cmd_cursor_offload_init(9)
• struct dmub_cmd_cursor_offload_stream_data(9)
• struct dmub_rb_cmd_cursor_offload_stream_cntl(9)
• union dmub_rb_cmd(9)
• union dmub_rb_out_cmd(9)
• struct dmub_rb_init_params(9)
• struct dmub_rb(9)

xoxo, your Unix bestie 💅 — source/version: ./drivers/gpu/drm/amd/display/...; date: October 2026; footer title: struct dmub...ata_dcn60_v1(9) 🫶