STRUCT DMA_SLAVE_CAPS(9)

✨ NAME ✨

Okay so bestie, struct dma_slave_caps — it's literally just here to expose the capabilities of a slave channel, and that's it. Nothing more, nothing less. Periodt. 💅

🦋 SYNOPSIS 🦋

struct dma_slave_caps {
    u32 src_addr_widths;
    u32 dst_addr_widths;
    u32 directions;
    u32 min_burst;
    u32 max_burst;
    u32 max_sg_burst;
    bool cmd_pause;
    bool cmd_resume;
    bool cmd_terminate;
    enum dma_residue_granularity residue_granularity;
    bool descriptor_reuse;
 };

🌸 Members 🌸

• src_addr_widths — okay so this is a bit mask of all the src addr widths this channel supports. Width is measured in bytes, so like, if a channel supports a width of 4, the mask should have BIT(4) set. That's the vibe check right there. 🎀
• dst_addr_widths — same energy as above but for dst addr widths. A bit mask of everything the channel can handle on the destination side. Slay. ✨
• directions — bit mask of the slave directions this channel supports. Now here's the thing: enum dma_transfer_direction is not defined as a bit flag for each type, so the DMA controller has to set BIT(<TYPE>) itself, and the controller should be checking it the same way too. Iykyk. 💜
• min_burst — the min burst capability per-transfer. Literally the smallest burst it'll do. 🦋
• max_burst — the max burst capability per-transfer. The biggest burst. Main character energy. 🔥
• max_sg_burst — max number of SG list entries that get executed in a single burst DMA transaction with no software intervention for reinitialization. And here's the cute part: a zero value means unlimited number of entries. No cap, fr fr. 💀
• cmd_pause — true if pause is supported (like, for reading residue or for resuming later). 🫶
• cmd_resume — true if resume is supported. 🌈
• cmd_terminate — true if the terminate cmd is supported. 💅
• residue_granularity — the granularity of the reported transfer residue. That's it, that's the whole vibe. ⭐
• descriptor_reuse — if a descriptor can be reused by the client and resubmitted multiple times. Iconic behavior honestly. 👑

🔥 SEE ALSO 🔥

Bestie you have to check out the kernel file ./include/linux/dmaengine.h and all these iconic neighbors too:

• dma_cookie_t(9)
• enum dma_status(9)
• enum dma_transaction_type(9)
• enum dma_transfer_direction(9)
• struct data_chunk(9)
• struct dma_interleaved_template(9)
• struct dma_vec(9)
• enum dma_ctrl_flags(9)
• enum sum_check_bits(9)
• enum sum_check_flags(9)
• enum dma_desc_metadata_mode(9)
• struct dma_chan_percpu(9)
• struct dma_router(9)
• struct dma_chan(9)
• struct dma_chan_dev(9)
• enum dma_slave_buswidth(9)
• struct dma_slave_config(9)
• enum dma_residue_granularity(9)
• dma_filter_fn(9)
• struct dma_async_tx_descriptor(9)
• struct dma_tx_state(9)
• enum dmaengine_alignment(9)
• struct dma_slave_map(9)
• struct dma_filter(9)
• struct dma_device(9)
• dmaengine_prep_peripheral_dma_vec(9)
• dmaengine_prep_config_sg_safe(9)
• dmaengine_prep_config_single_safe(9)
• dmaengine_prep_dma_memset(9)
• dmaengine_terminate_all(9)
• dmaengine_terminate_async(9)
• dmaengine_synchronize(9)
• dmaengine_terminate_sync(9)
• dma_async_issue_pending(9)
• dma_async_is_tx_complete(9)
• dma_async_is_complete(9)

💖 That's the whole page bestie. Go forth and know your slave channel capabilities. No notes. 🧚

Last updated October 2026 by the absolute legends over in ./include/linux — mwah, love u, thanks for the docs 🍓