STRUCT DIV6_CLOCK(9)

💖 NAME 💖

struct div6_clock — it's giving CPG 6 bit divider clock, bestie. That's the whole assignment, and honestly? Iconic. 💅

✨ SYNOPSIS ✨

Okay so here's the struct shape, and yes, you're gonna want to keep every field exactly as written:

struct div6_clock {
    struct clk_hw hw;
    void __iomem *reg;
    unsigned int div;
    u32 src_mask;
    struct notifier_block nb;
    u8 parents[];
};

🫶 Members 🫶

• hw — the handle between common and hardware-specific interfaces. It's literally the go-between, no cap. 🦋
• reg — IO-remapped register. That's the register situation, mapped and ready. ✨
• div — divisor value, and it lives in the 1-64 range. Stay in range, bestie, it's not a suggestion. 💀
• src_mask — bitmask covering the register bits to select the parent clock. It's giving "which parent?" energy. 🌸
• nb — notifier block to save/restore clock state for system resume. Resume needs its little state back, okay? 😭
• parents — array to map from valid parent clocks indices to hardware indices. Literally the mapping bestie, iykyk. 🔥

🌈 SEE ALSO 🌈

Kernel file ./drivers/clk/renesas/clk-div6.c and cpg_div6_register(9). Go read, slay, repeat. 🎀

source ./drivers/clk/renesas · October 2026 · struct div6_clock(9) — byeee, mwah 💜