STRUCT CLK_PLLV3(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ struct clk_pllv3(9) ✨

okay bestie, welcome to the Kernel API Manual πŸ’– today we're doing struct clk_pllv3 β€” it's giving IMX PLL clock version 3 and honestly it's kind of iconic.


πŸ¦‹ NAME πŸ¦‹

struct clk_pllv3 β€” IMX PLL clock version 3, no cap πŸ’…


🌸 SYNOPSIS 🌸

struct clk_pllv3 {
    struct clk_hw   hw;
    void __iomem    *base;
    u32 power_bit;
    bool powerup_set;
    u32 div_mask;
    u32 div_shift;
    unsigned long   ref_clock;
    u32 num_offset;
    u32 denom_offset;
 };

like, that's the whole struct, every single field, right there πŸŽ€ copy it exactly bestie, do NOT freestyle.


πŸŽ€ Members πŸŽ€

  • hw β€” the clock source itself, the main character of the struct πŸ‘‘
  • base β€” base address of the PLL registers, where all the good stuff lives πŸ’–
  • power_bit β€” the pll power bit mask, iykyk πŸ”₯
  • powerup_set β€” set power_bit to power up the PLL ⚑
  • div_mask β€” mask of the divider bits 🎯
  • div_shift β€” shift of the divider bits, literally just the shift 🌈
  • ref_clock β€” reference clock rate, the vibe check number πŸ•°οΈ
  • num_offset β€” num register offset, cute little offset ✨
  • denom_offset β€” denom register offset, its bestie 🫢

πŸ’œ Description πŸ’œ

so this is the IMX PLL clock version 3, found on i.MX6 series 🧚 periodt.

and here's the tea bestie 🍡 β€” the divider for pllv3 is actually a multiplier πŸ™ˆ not a divider, and it always sits at bit 0. like it's always been there, always will be. that's just the lore.


🌟 SEE ALSO 🌟

  • Kernel file ./drivers/clk/imx/clk-pllv3.c β€” go read it, it ate πŸ’…

okay that's the page bestie, you're officially a pllv3 scholar now πŸŽ“βœ¨ mwah πŸ’–

sign-off cuteness: this lil masterpiece comes to you from the source ./drivers/clk/imx and it's dated October 2026 πŸ—“οΈπŸŒΈ and the page you just read? yeah, that's struct clk_pllv3(9) β€” remember it fondly πŸ«ΆπŸ’œ

πŸ“¦ where this page comes from