STRUCT CCS_PLL(9)

💅 struct ccs_pll — bestie, the Kernel API Manual has entered the chat 💅

okay so welcome to the ccs_pll(9) page, no cap. This is the Full CCS PLL configuration struct, and she is giving main character energy. We are keeping every field, every input/output tag, and every reference — periodt. 💖

🌸 NAME 🌸

• struct ccs_pll — Full CCS PLL configuration

✨ SYNOPSIS ✨

bestie, here’s the struct in all her glory:

struct ccs_pll {
    u8 bus_type;
    u8 op_lanes;
    u8 vt_lanes;
    struct {
      u8 lanes;
    } csi2;
    u8 binning_horizontal;
    u8 binning_vertical;
    u8 scale_m;
    u8 scale_n;
    u8 bits_per_pixel;
    u8 op_bits_per_lane;
    u16 flags;
    u32 link_freq;
    u32 ext_clk_freq_hz;
    struct ccs_pll_branch_fr vt_fr;
    struct ccs_pll_branch_bk vt_bk;
    struct ccs_pll_branch_fr op_fr;
    struct ccs_pll_branch_bk op_bk;
    u32 pixel_rate_csi;
    u32 pixel_rate_pixel_array;
 };

🫶 Members 🫶

• bus_type — Type of the data bus, CCS_PLL_BUS_TYPE_* (input)
• op_lanes — Number of operational lanes (input)
• vt_lanes — Number of video timing lanes (input)
• csi2 — CSI-2 related parameters
  • csi2.lanes — The number of the CSI-2 data lanes (input)
• binning_horizontal — Horizontal binning factor (input)
• binning_vertical — Vertical binning factor (input)
• scale_m — Downscaling factor, M component, [16, max] (input)
• scale_n — Downscaling factor, N component, typically 16 (input)
• bits_per_pixel — Bits per pixel on the output data bus (input)
• op_bits_per_lane — Number of bits per OP lane (input)
• flags — CCS_PLL_FLAG_* (input)
• link_freq — Chosen link frequency (input)
• ext_clk_freq_hz — External clock frequency, i.e. the sensor’s input clock (input)
• vt_fr — Video timing front-end configuration (output)
• vt_bk — Video timing back-end configuration (output)
• op_fr — Operational timing front-end configuration (output)
• op_bk — Operational timing back-end configuration (output)
• pixel_rate_csi — Pixel rate on the output data bus (output)
• pixel_rate_pixel_array — Nominal pixel rate in the sensor’s pixel array (output)

💜 Description 💜

All information required to calculate CCS PLL configuration — that’s the whole point, bestie. It’s giving “every field you need for the full CCS PLL configuration glow-up,” and not me being obsessed with a kernel struct. 💅

🦋 SEE ALSO 🦋

iykyk, these are the related pages and the kernel file:

• Kernel file ./drivers/media/i2c/ccs-pll.h
• struct ccs_pll_branch_fr(9)
• struct ccs_pll_branch_bk(9)
• struct ccs_pll_branch_limits_fr(9)
• struct ccs_pll_branch_limits_bk(9)
• struct ccs_pll_limits(9)
• ccs_pll_calculate(9)

mwah 💋 this page lives in ./drivers/media/i2c, dated October 2026, and yes bestie it’s still struct ccs_pll(9) — slay.