STRUCT BXT_DPIO_PHY_INFO(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ struct bxt_dpio_phy_info(9) ✨

okay bestie, buckle up πŸ’… this is a page from the Kernel API Manual, and honestly it's giving "small struct, big responsibilities" energy. It's all about struct bxt_dpio_phy_info β€” the little container that holds info for a broxton DDI phy πŸŽ€


🌸 NAME 🌸

struct bxt_dpio_phy_info β€” hold info for a broxton DDI phy ✨


πŸ¦‹ SYNOPSIS πŸ¦‹

like, here's literally the whole shape of it, no cap:

struct bxt_dpio_phy_info {
    bool dual_channel;
    enum dpio_phy rcomp_phy;
    int reset_delay;
    u32 pwron_mask;
    struct {
      enum port port;
    } channel[2];
 };

πŸ’– Members πŸ’–

  • dual_channel β€” true if this phy has a second channel. that's it, that's the whole vibe 🫢
  • rcomp_phy β€” if it's -1, that means this phy has its own rcomp resistor (main character energy, self-sufficient πŸ’…). otherwise, the GRC value gets copied from the phy that this field points at πŸ‘‘
  • reset_delay β€” the delay, in us, to wait before setting the common reset bit in BXT_PHY_CTL_FAMILY β€” which is the thing that effectively enables the phy. so yeah, it's the "hold up, wait a sec" timer ⏳
  • pwron_mask β€” a mask with the appropriate bit set that would cause the punit to power this phy if written to BXT_P_CR_GT_DISP_PWRON. basically the magic bit that says "turn it on pls" πŸ”₯
  • channel β€” struct containing per channel information 🧚
  • channel.port β€” which port maps to this channel. simple as that πŸ“

🌈 SEE ALSO 🌈

  • Kernel file ./drivers/gpu/drm/i915/display/intel_dpio_phy.c
  • DPIO(9)

lowkey obsessed with how much lore is packed into such a tiny struct, fr fr 😭

that's the whole page bestie, hope it slayed πŸ’–βœ¨ this one's from ./drivers/gpu/drm/i915/display, dated October 2026, and it's struct bxt_dpio_phy_info(9) β€” periodt πŸŽ€πŸ’œ

πŸ“¦ where this page comes from