STRUCT AXXIA_DIVCLK(9)

💖 struct axxia_divclk(9) 💖

okay bestie, welcome to the Kernel API Manual entry for struct axxia_divclk(9) — yes that's a mouthful, yes it's from the Kernel API Manual section 9, and yes we're gonna get through it together 🫶

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✨ NAME ✨

struct axxia_divclk — it's the Axxia clock divider, literally that's the whole vibe. a little struct whose entire main character job is dividing a clock 💅

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🌸 SYNOPSIS 🌸

struct axxia_divclk {
    struct axxia_clk aclk;
    u32 reg;
    u32 shift;
    u32 width;
 };

no cap, that's the whole shape of it. four fields, four little icons 🎀

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🦋 Members 🦋

• aclk — the common struct. every divider carries one, it's like the base layer of the outfit ✨
• reg — the offset into regmap for the PLL control register. that's where the actual register lives, iykyk 📍
• shift — the bit position for the divider value. tells you where the bits start, like a bookmark for bits 🔖
• width — how many bits are in the divider value. the size of the little bit-window, fr fr 🌈

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👑 SEE ALSO 👑

go look at the kernel file ./drivers/clk/clk-axm5516.c (iconic file, honestly) and also these besties:

• struct axxia_clk(9)
• struct axxia_pllclk(9)
• axxia_pllclk_recalc(9)
• axxia_divclk_recalc_rate(9)
• struct axxia_clkmux(9)
• axxia_clkmux_get_parent(9)

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💀 reminder: this is documentation for a kernel struct, so it's giving "reference material", not "tutorial". all the deets above are the deets — no extras, no guessing 💜

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and that's the page, bestie!! 🍓 sign-off time: this one lives in ./drivers/clk and it's dated October 2026, filed under struct axxia_divclk(9) — slay, go read the source, mwah 😭💖🧚