STRUCT AXXIA_CLKMUX(9)

💅 struct axxia_clkmux(9)

okay so bestie, welcome to the Kernel API Manual ✨ — this is the page for struct axxia_clkmux, aka the Axxia clock mux, and honestly? it's giving small-but-mighty. no cap, it's just four fields and a dream 🎀

🌸 NAME

struct axxia_clkmux — Axxia clock mux 🕰️✨

🦋 SYNOPSIS

struct axxia_clkmux {
    struct axxia_clk aclk;
    u32 reg;
    u32 shift;
    u32 width;
 };

like… look at her. iconic. 🫶

💖 Members

• aclk — the common struct, iykyk — every mux in this family carries one around like a little emotional support field 🥺
• reg — the offset into regmap for the PLL control register. lowkey the address of where the magic happens 📍
• shift — the bit position for the selection value. the way it just points at exactly which bit we're talking about… precision queen 👑
• width — the number of bits in the selection value. so if shift says where, width says how many, and together they're literally the whole vibe check for reading that field 📏

bestie remind me to never casually poke a PLL control register without knowing my shift and width first, fr fr 🙈

⭐ SEE ALSO

Kernel file ./drivers/clk/clk-axm5516.c, plus the whole squad:

• struct axxia_clk(9)
• struct axxia_pllclk(9)
• axxia_pllclk_recalc(9)
• struct axxia_divclk(9)
• axxia_divclk_recalc_rate(9)
• axxia_clkmux_get_parent(9)

go read them, they're all main character energy too 💅✨

okay that's the whole page, you ate that 🍓💜 — this was served fresh from ./drivers/clk, dated October 2026, and it's struct axxia_clkmux(9) all the way down, periodt 🌈🎀