STRUCT ATMEL_PIOCTRL(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ struct atmel_pioctrl(9) ✨

okay bestie, so this is from the Kernel API Manual β€” a whole struct atmel_pioctrl, which is literally the Atmel PIO controller (pinmux + gpio). it's giving "one struct to rule them all" and honestly? iconic. πŸŽ€


πŸ’– NAME πŸ’–

struct atmel_pioctrl β€” the Atmel PIO controller, doing double duty as pinmux + gpio. yes ma'am, both. πŸ’…


🌸 SYNOPSIS 🌸

struct atmel_pioctrl {
    void __iomem            *reg_base;
    struct clk              *clk;
    unsigned int            nbanks;
    struct pinctrl_dev      *pinctrl_dev;
    struct atmel_group      *groups;
    const char * const      *group_names;
    struct atmel_pin        **pins;
    unsigned int            npins;
    struct gpio_chip        *gpio_chip;
    struct irq_domain       *irq_domain;
    int *irqs;
    unsigned int            *pm_wakeup_sources;
    struct {
      u32 imr;
      u32 odsr;
      u32 cfgr[ATMEL_PIO_NPINS_PER_BANK];
    } *pm_suspend_backup;
    struct device           *dev;
    struct device_node      *node;
    unsigned int            slew_rate_support;
 };

no cap, that's the whole shape of it. let's go member by member 🫢


πŸ¦‹ Members πŸ¦‹

  • reg_base β€” base address of the controller. the home address, if you will 🏠
  • clk β€” clock of the controller. it's the heartbeat, fr fr ⏰
  • nbanks β€” number of PIO groups. heads up: it can vary depending on the SoC, so don't come for me if your board's count is different πŸ’€
  • pinctrl_dev β€” the pinctrl device that got registered.
  • groups β€” the groups table, there to provide group name and pin in the group to pinctrl. very "here's your label, here's your pin" energy 🏷️
  • group_names β€” group names table, providing all the group/pin names to pinctrl or gpio. sharing is caring.
  • pins β€” pins table, used for both pinctrl and gpio. the pin_id, bank and line fields are set at probe time; the other ones are set when parsing dt pinctrl. so it's a two-phase glow-up ✨
  • npins β€” number of pins, periodt.
  • gpio_chip β€” the gpio chip that got registered.
  • irq_domain β€” irq domain for the gpio controller. interrupt royalty πŸ‘‘
  • irqs β€” table containing the hw irq number of the bank. and the index of the table is the bank id β€” iykyk πŸ”₯
  • pm_wakeup_sources β€” bitmap of wakeup sources (lines).
  • pm_suspend_backup β€” backup/restore register values on suspend/resume. it remembers so you don't have to 😭 inside it lives u32 imr, u32 odsr, and u32 cfgr[ATMEL_PIO_NPINS_PER_BANK].
  • dev β€” device entry for the Atmel PIO controller.
  • node β€” node of the Atmel PIO controller.
  • slew_rate_support β€” slew rate support. yes that's the whole description and yes we're keeping it πŸ’…

🌈 SEE ALSO 🌈

  • Kernel file ./drivers/pinctrl/pinctrl-at91-pio4.c
  • struct atmel_pioctrl_data(9)

and that's the vibe check, bestie 🧚 source lives under ./drivers/pinctrl, dated October 2026 β€” struct atmel_pioctrl(9), signed, sealed, slayed. πŸ’œ

πŸ“¦ where this page comes from