STRUCT ASPEED_PCIE_PORT(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ NAME ✨

okay so bestie, welcome to the struct aspeed_pcie_port(9) page from the Kernel API Manual πŸ’–

struct aspeed_pcie_port β€” PCIe port information.

This is the struct that keeps the PCIe port info together, and we’re doing a full member roll call β€” every field, no skipping, no cap 🫢

🌸 SYNOPSIS 🌸

       struct aspeed_pcie_port {
           struct list_head list;
           struct aspeed_pcie *pcie;
           struct clk *clk;
           struct phy *phy;
           struct reset_control *perst;
           u32 slot;
        };

πŸŽ€ Members πŸŽ€

  • list β€” port list. Type: struct list_head. It’s giving β€œkeep the port list in line” energy πŸ’…
  • pcie β€” pointer to PCIe host info. Type: struct aspeed_pcie *. Literally pointing at the PCIe host info πŸ‘‘
  • clk β€” pointer to the port clock gate. Type: struct clk *. Clock gate pointer, slay ⏰
  • phy β€” pointer to PCIe PHY. Type: struct phy *. PHY pointer, iconic 🧚
  • perst β€” pointer to port reset control. Type: struct reset_control *. Reset control pointer, periodt πŸ”
  • slot β€” port slot. Type: u32. Slot number vibes, no cap 🎰

πŸ”— SEE ALSO πŸ”—

  • Kernel file ./drivers/pci/controller/pcie-aspeed.c β€” also check out struct aspeed_pcie(9) and struct aspeed_pcie_rc_platform(9) πŸ¦‹

mwah πŸ’‹ that’s the whole page, bestie β€” source/version ./drivers/pci/controller, dated October 2026. Go be iconic with your PCIe ports 🌈✨

πŸ“¦ where this page comes from