STRUCT ANAND(9)
๐ struct anand(9) ๐
okay so welcome to the Kernel API Manual, bestie โ today's main character is struct anand, and its whole personality is "I define the NAND chip related information." that's it, that's the vibe. it's giving โจ documentation โจ and honestly? we're obsessed. ๐
โจ NAME โจ
struct anand โ literally defines the NAND chip related information. no cap, that's the whole job. ๐
๐ฆ SYNOPSIS ๐ฆ
here's the glow-up in code form, copied exactly, don't touch a single character or i will cry:
struct anand {
struct list_head node;
struct nand_chip chip;
unsigned int rb;
unsigned int page_sz;
unsigned long clk;
u32 data_iface;
u32 timings;
u32 ecc_conf;
u32 strength;
u16 raddr_cycles;
u16 caddr_cycles;
unsigned int ecc_bits;
unsigned int ecc_total;
unsigned int *errloc;
u8 *hw_ecc;
struct bch_control *bch;
int *cs_idx;
int ncs_idx;
};
likeโฆ she's structured. she's organized. she has range. ๐
๐ธ Members ๐ธ
okay now the meet-the-cast section, gather round besties ๐ซถ
nodeโ used to store NAND chips into a list. she's a social queen, she links the whole friend group together. ๐chipโ the NAND chip information structure. the whole info dump, iconically. ๐rbโ ready-busy line. the "are you done yet??" wire. โณpage_szโ register value of thepage_szfield to use. the exact value you're plugging in. ๐clkโ expected clock frequency to use. the tempo, the BPM, the heartbeat of the whole operation. ๐data_ifaceโ data interface timing mode to use. pick your mode, bestie. ๐๏ธtimingsโ NV-DDR specific timings to use. very specific, very fancy. โกecc_confโ hardware ECC configuration value. the error-correcting config, slay. ๐ ๏ธstrengthโ register value of the ECC strength. how hard the ECC goes. ๐ชraddr_cyclesโ row address cycle information. ๐งญcaddr_cyclesโ column address cycle information. ๐ecc_bitsโ exact number of ECC bits per syndrome. exact, no guesses, periodt. ๐ขecc_totalโ total number of ECC bytes. the whole bag. ๐errlocโ array of errors located with soft BCH. the naughty list, basically ๐ญhw_eccโ buffer to store syndromes computed by hardware. hardware did the math, this holds the receipts. ๐งพbchโ BCH structure. justโฆ the BCH structure. iconic in its brevity. ๐cs_idxโ array of chip-select for this device, values are indexes of the controller structuregpio_csarray. yes, indexes of thegpio_csarray, we said what we said. ๐ncs_idxโ size of thecs_idxarray. someone has to keep count. ๐งฎ
fr fr every member above is exactly as documented โ nothing added, nothing skipped, no invented lore. i would never. ๐
๐ SEE ALSO ๐
go touch some other kernel files, bestie:
- Kernel file
./drivers/mtd/nand/raw/arasan-nand-controller.c struct anfc_op(9)struct arasan_nfc(9)
and that's the whole page, mwah ๐ this lil love letter lives in ./drivers/mtd/nand/raw and it's dated October 2026 โ so mark your calendar, screenshot it, put it on your story, whatever. bye bestie, go read a struct! ๐
๐ฆ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- ๐ girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms