STRUCT ADF_GEN6_TL_SLICE_DATA_REGS(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

✨ NAME ✨

okay so bestie, welcome to the Kernel API Manual πŸ’– β€” this page is all about struct adf_gen6_tl_slice_data_regs, which is literally just HW slice data as populated by FW. that's it, that's the whole vibe. hardware slice stuff, filled in by firmware, handed to you πŸŽ€


🌸 SYNOPSIS 🌸

here's the whole struct, bestie β€” two fields, both __u32, no cap:

struct adf_gen6_tl_slice_data_regs {
    __u32 reg_tm_slice_exec_cnt;
    __u32 reg_tm_slice_util;
 };

that's the entire thing. not me being obsessed with how tidy this is 😭✨


πŸ¦‹ Members πŸ¦‹

okay so let's meet the two members, they're giving minimalism:

  • reg_tm_slice_exec_cnt β€” the slice execution count πŸ’… that's it. that's the fact. it counts slice executions.
  • reg_tm_slice_util β€” the slice utilization 🌸 how utilized the slice is. iconic, honestly.
fr fr, that's every field β€” don't go looking for more, there are literally only two 🫢

πŸ‘‘ SEE ALSO πŸ‘‘

if you want the rest of the lore, go check the kernel file ./drivers/crypto/intel/qat/qat_common/adf_gen6_tl.h β€” it's all there iykyk. and while you're at it, these sibling structs are also main character energy:

  • struct adf_gen6_tl_cmdq_data_regs(9)
  • struct adf_gen6_tl_device_data_regs(9)
  • struct adf_gen6_tl_ring_pair_data_regs(9)
  • struct adf_gen6_tl_layout(9)

go read them, they're all connected, the whole friend group 🧚


okay and now the cute little sign-off: this whole page came from ./drivers/crypto/intel/qat/qat... and it's dated October 2026 β€” so like, from the future, slay πŸ’œβœ¨

πŸ“¦ where this page comes from