STRUCT ADF_GEN4_TL_DEVICE_DATA_REGS(9)
π struct adf_gen4_tl_device_data_regs β a peek inside the Kernel API Manual π
okay bestie, sit down, because we're about to get into struct adf_gen4_tl_device_data_regs and honestly? it's giving β¨telemetry eraβ¨. This structure stores device telemetry counter values as are being populated periodically by device. that's the whole vibe β the device keeps topping these off like it's refilling your iced coffee π§β and this struct is where all of it lives.
πΈ SYNOPSIS πΈ
no cap, here's the whole shape of her β every field, in order, exactly as she is:
struct adf_gen4_tl_device_data_regs {
__u64 reg_tl_rd_lat_acc;
__u64 reg_tl_gp_lat_acc;
__u64 reg_tl_at_page_req_lat_acc;
__u64 reg_tl_at_trans_lat_acc;
__u64 reg_tl_re_acc;
__u32 reg_tl_pci_trans_cnt;
__u32 reg_tl_rd_lat_max;
__u32 reg_tl_rd_cmpl_cnt;
__u32 reg_tl_gp_lat_max;
__u32 reg_tl_ae_put_cnt;
__u32 reg_tl_bw_in;
__u32 reg_tl_bw_out;
__u32 reg_tl_at_page_req_cnt;
__u32 reg_tl_at_trans_lat_cnt;
__u32 reg_tl_at_max_tlb_used;
__u32 reg_tl_re_cnt;
__u32 reserved;
struct adf_gen4_tl_slice_data_regs ath_slices[ADF_GEN4_TL_MAX_SLICES_PER_TYPE];
struct adf_gen4_tl_slice_data_regs cph_slices[ADF_GEN4_TL_MAX_SLICES_PER_TYPE];
struct adf_gen4_tl_slice_data_regs cpr_slices[ADF_GEN4_TL_MAX_SLICES_PER_TYPE];
struct adf_gen4_tl_slice_data_regs xlt_slices[ADF_GEN4_TL_MAX_SLICES_PER_TYPE];
struct adf_gen4_tl_slice_data_regs dcpr_slices[ADF_GEN4_TL_MAX_SLICES_PER_TYPE];
struct adf_gen4_tl_slice_data_regs pke_slices[ADF_GEN4_TL_MAX_SLICES_PER_TYPE];
struct adf_gen4_tl_slice_data_regs ucs_slices[ADF_GEN4_TL_MAX_SLICES_PER_TYPE];
struct adf_gen4_tl_slice_data_regs wat_slices[ADF_GEN4_TL_MAX_SLICES_PER_TYPE];
struct adf_gen4_tl_slice_data_regs wcp_slices[ADF_GEN4_TL_MAX_SLICES_PER_TYPE];
};
like, look at her. five __u64s up top doing the heavy lifting, then it's __u32 szn π₯, one little reserved doing absolutely nothing (respect tho π
), and then nine whole slice arrays. main character energy, fr fr.
π Members π
okay so here's the member-by-member breakdown, and no I did not skip a single one, iykyk:
reg_tl_rd_lat_accβ read latency accumulator π« (it's accumulating, she's been through a lot)reg_tl_gp_lat_accβ get-put latency accumulatorreg_tl_at_page_req_lat_accβ AT/DevTLB page request latency accumulatorreg_tl_at_trans_lat_accβ DevTLB transaction latency accumulatorreg_tl_re_accβ accumulated ring empty time π³οΈ (the ring was empty, she kept track)reg_tl_pci_trans_cntβ PCIe partial transactionsreg_tl_rd_lat_maxβ maximum logged read latency, the record-holder πreg_tl_rd_cmpl_cntβ read requests completed count βreg_tl_gp_lat_maxβ maximum logged get to put latencyreg_tl_ae_put_cntβ Accelerator Engine put counts across all rings, like all of them, she's thoroughreg_tl_bw_inβ PCIe write bandwidthreg_tl_bw_outβ PCIe read bandwidthreg_tl_at_page_req_cntβ DevTLB page requests countreg_tl_at_trans_lat_cntβ DevTLB transaction latency samples countreg_tl_at_max_tlb_usedβ maximum uTLB usedreg_tl_re_cntβ ring empty time samples countreservedβ reserved π«₯ (she's literally just sitting there, iconic)ath_slicesβ array of Authentication slices utilization registers π¦cph_slicesβ array of Cipher slices utilization registerscpr_slicesβ array of Compression slices utilization registersxlt_slicesβ array of Translator slices utilization registersdcpr_slicesβ array of Decompression slices utilization registerspke_slicesβ array of PKE slices utilization registersucs_slicesβ array of UCS slices utilization registerswat_slicesβ array of Wireless Authentication slices utilization registers πwcp_slicesβ array of Wireless Cipher slices utilization registers
π reminder bestie: every single one of those slice arrays is sized ADF_GEN4_TL_MAX_SLICES_PER_TYPE. don't come for me, that's just how it is.
π¦ SEE ALSO π¦
go look at the Kernel file ./drivers/crypto/intel/qat/qat_common/adf_gen4_tl.h β and while you're in the neighborhood, say hi to struct adf_gen4_tl_slice_data_regs(9), struct adf_gen4_tl_ring_pair_data_regs(9), and struct adf_gen4_tl_layout(9) π«Ά they're all part of the same friend group, honestly.
and that's the page!! π sourced from ./drivers/crypto/intel/qat/qat... and dated October 2026, brought to you by your resident kernel-obsessed bestie. slay, go read some more manpages, mwah πβ¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms