soc15_progr...ter_sequence(9)

💅 soc15_progr...ter_sequence(9) — like, the Kernel API Manual edition 🎀

okay bestie, welcome to the group chat where we talk about soc15_program_register_sequence. yes the header truncates it to soc15_progr...ter_sequence(9) (the manual is that Kernel API Manual one, iykyk) but the real full name is right down there. let's go ✨

---

✨ NAME ✨

soc15_program_register_sequence — programs an array of registers. that's it, that's the whole vibe. 🫶

---

🌸 SYNOPSIS 🌸

void soc15_program_register_sequence (struct amdgpu_device *adev , const
struct soc15_reg_golden *regs , const u32 array_size );

literally the signature, character for character, no cap 💅

---

🦋 ARGUMENTS 🦋

• adev — the amdgpu_device pointer, your main character 🫶
• regs — pointer to the register array, the whole squad of registers
• array_size — size of the register array, so we know how many besties we're working with 🌈

---

💖 DESCRIPTION 💖

so what does it actually do? it programs an array or registers (yes, "or" — that's the original wording, we don't gatekeep) using and and or masks. the way it just slaps those masks on there. 🔥

and the tea? it's a helper for setting golden registers. that's the whole job. iconic, honestly 👑

---

⭐ SEE ALSO ⭐

• Kernel file ./drivers/gpu/drm/amd/amdgpu/soc15.c — go read it, bestie, it's giving source code realness 📖

---

lowkey reminder: this page lives in ./drivers/gpu/drm/amd/amdgpu, dated October 2026, and it's soc15_progr...ter_sequence(9) all over again at the bottom. slay 💀💖

okay that's the whole page, periodt. go program those golden registers responsibly, bestie 🧚‍♀️✨🎀