snd_hdac_i915_set_bclk(9)

💅 snd_hdac_i915_set_bclk — kernel API manual, bestie edition ✨

okay so this is snd_hdac_i915_set_bclk, and the whole entire job of it is reprogramming BCLK for HSW/BDW. that's it. that's the vibe. 🎀

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✨ SYNOPSIS ✨

void snd_hdac_i915_set_bclk (struct hdac_bus *bus );

like, you hand it a bus and it returns nothing. void. no notes. 💅

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🫶 ARGUMENTS 🫶

• bus — the HDA core bus. that's the whole argument. she takes one (1) bus and she's booked and busy.

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🌸 DESCRIPTION 🌸

okay so picture this: the Intel HSW/BDW display HDA controller lives inside the GPU. not next to it. in it. main character energy fr fr. and because of that, both its power and its link BCLK depend on the GPU. it's giving codependent, but make it hardware. 😭

so there's these two Extended Mode registers doing the clock math for us:

• EM4 — the M value
• EM5 — the N Value

and together they convert CDClk (that's Core Display Clock, iykyk) into a 24MHz BCLK, like this:

BCLK = CDCLK * M / N

math ate, honestly. 🔥

🚨 but here's the part where you gotta pay attention: those values get lost when the display power well is disabled. gone. deleted. and you need to restore them, otherwise you get abnormal playback speed. so like… don't skip that step bestie. 🙈

call this function at:

• initializing 💖
• changing the power well ⚡
• the ELD notifier for the hotplug 🔌

three moments. all three. no cap.

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🦋 SEE ALSO 🦋

• Kernel file ./sound/hda/core/i915.c
• snd_hdac_i915_init(9)

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and that's the page!! go forth and restore those BCLK values, queen 👑

✨ this cutie was served fresh from ./sound/hda/core, October 2026 edition — mwah, ilysm, now go read the source 🫶💖