RAS_ENABLE (INT)(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’– ras_enable (int)(9) πŸ’–

okay so bestie, you're reading the Kernel API Manual, and today's main-character energy is literally ras_enable (int) πŸ’…βœ¨. tiny page, but the SEE ALSO list is giving full squad, no cap.

✨ ras_enable (int) ✨

the actual job is literally: Enable RAS features on the GPU β€” 0 = disable, 1 = enable, -1 = auto (default). πŸ¦‹

like, vibe check: 0 disables, 1 enables, and -1 is the auto setting that's also the default, periodt. πŸ’–

πŸ’… SEE ALSO πŸ’…

Kernel file: ./drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c β€” and here's the whole bestie lineup, iykyk:

  • vramlimit (int)(9)
  • vis_vramlimit (int)(9)
  • gartsize (uint)(9)
  • gttsize (int)(9)
  • moverate (int)(9)
  • audio (int)(9)
  • disp_priority (int)(9)
  • hw_i2c (int)(9)
  • pcie_gen2 (int)(9)
  • msi (int)(9)
  • svm_default_granularity (uint)(9)
  • lockup_timeout (string)(9)
  • dpm (int)(9)
  • fw_load_type (int)(9)
  • aspm (int)(9)
  • runpm (int)(9)
  • ip_block_mask (uint)(9)
  • bapm (int)(9)
  • deep_color (int)(9)
  • vm_size (int)(9)
  • vm_fragment_size (int)(9)
  • vm_block_size (int)(9)
  • vm_fault_stop (int)(9)
  • vm_update_mode (int)(9)
  • exp_hw_support (int)(9)
  • dc (int)(9)
  • sched_jobs (int)(9)
  • sched_hw_submission (int)(9)
  • ppfeaturemask (hexint)(9)
  • forcelongtraining (uint)(9)
  • pcie_gen_cap (uint)(9)
  • pcie_lane_cap (uint)(9)
  • cg_mask (ullong)(9)
  • pg_mask (uint)(9)
  • sdma_phase_quantum (uint)(9)
  • disable_cu (charp)(9)
  • virtual_display (charp)(9)
  • lbpw (int)(9)
  • gpu_recovery (int)(9)
  • emu_mode (int)(9)
  • ras_mask (uint)(9)
  • timeout_fatal_disable (bool)(9)
  • timeout_period (uint)(9)
  • si_support (int)(9)
  • cik_support (int)(9)
  • smu_memory_pool_size (uint)(9)
  • async_gfx_ring (int)(9)
  • mcbp (int)(9)
  • discovery (int)(9)
  • mes_log_enable (int)(9)
  • uni_mes (int)(9)
  • noretry (int)(9)
  • force_asic_type (int)(9)
  • use_xgmi_p2p (int)(9)
  • sched_policy (int)(9)
  • hws_max_conc_proc (int)(9)
  • cwsr_enable (int)(9)
  • max_num_of_queues_per_device (int)(9)
  • send_sigterm (int)(9)
  • halt_if_hws_hang (int)(9)
  • hws_gws_support(bool)(9)
  • queue_preemption_timeout_ms (int)(9)
  • debug_evictions(bool)(9)
  • no_system_mem_limit(bool)(9)
  • no_queue_eviction_on_vm_fault (int)(9)
  • mtype_local (int)(9)
  • pcie_p2p (bool)(9)
  • dcfeaturemask (uint)(9)
  • dcdebugmask (uint)(9)
  • abmlevel (uint)(9)
  • damageclips (int)(9)
  • tmz (int)(9)
  • freesync_video (uint)(9)
  • reset_method (int)(9)
  • bad_page_threshold (int) Bad page threshold is specifies the(9)
  • vcnfw_log (int)(9)
  • sg_display (int)(9)
  • umsch_mm (int)(9)
  • umsch_mm_fwlog (int)(9)
  • smu_pptable_id (int)(9)
  • partition_mode (int)(9)
  • enforce_isolation (int)(9)
  • modeset (int)(9)
  • seamless (int)(9)
  • debug_mask (uint)(9)
  • agp (int)(9)
  • wbrf (int)(9)
  • rebar (int)(9)
  • user_queue (int)(9)
  • ptl (int)(9)

that's the whole page, bestie β€” no cap, every reference made it in 🫢

source/version: ./drivers/gpu/drm/amd/amdgpu Β· date: October 2026 Β· filed under ras_enable (int)(9) πŸŽ€

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