pvr_round_up...cheline_size(9)

💖 pvr_round_up...cheline_size(9) — Kernel API Manual 💖

okay bestie, welcome to the pvr_round_up...cheline_size(9) page in the Kernel API Manual. this one is short, sweet, and lowkey iconic ✨

🌸 NAME 🌸

pvr_round_up_to_cacheline_size — round up a provided size to be cacheline aligned 💫

💅 SYNOPSIS 💅

size_t pvr_round_up_to_cacheline_size (struct pvr_device *pvr_dev ,
size_t size );

✨ ARGUMENTS ✨

• pvr_dev — target PowerVR device. that's the device bestie you're pointing at 🫶
• size — initial size, in bytes. the starting point before the rounding glow-up 🎀

🎀 RETURN 🎀

• Size aligned to cacheline size. that's the whole return vibe, periodt 💅

🌈 SEE ALSO 🌈

Kernel file: ./drivers/gpu/drm/imagination/pvr_device.h — this is the home base for the whole squad 🏠

the whole friend group, fr fr:

• struct pvr_gpu_id(9)
• struct pvr_fw_version(9)
• struct pvr_device_data(9)
• struct pvr_device(9)
• struct pvr_file(9)
• PVR_HAS_FEATURE(9)
• PVR_FEATURE_VALUE(9)
• PVR_HAS_QUIRK(9)
• PVR_HAS_ENHANCEMENT(9)
• PVR_PACKED_BVNC(9)
• pvr_gpu_id_to_packed_bvnc(9)
• PVR_CR_FIELD_GET(9)
• pvr_cr_read32(9)
• pvr_cr_read64(9)
• pvr_cr_write32(9)
• pvr_cr_write64(9)
• pvr_cr_poll_reg32(9)
• pvr_cr_poll_reg64(9)
• IOCTL validation helpers(9)
• pvr_ioctl_union_padding_check(9)
• PVR_STATIC_ASSERT_64BIT_ALIGNED(9)
• PVR_IOCTL_UNION_PADDING_CHECK(9)

xoxo, your kernel bestie 💖 — source/version: ./drivers/gpu/drm/imagination, date: October 2026. mwah! 💋