ksz_phylink...nable_tx_lpi(9)
π ksz_phylink_mac_enable_tx_lpi β a lil' peek from the Kernel API Manual β¨
okay so bestie, picture this: a whole manual page, right, and it's literally from the Kernel API Manual. the star of the show? ksz_phylink_mac_enable_tx_lpi. she's a callback, she's dummy, she's iconic, and she's about to explain herself. buckle up π
πΈ NAME πΈ
ksz_phylink_mac_enable_tx_lpi β the callback that signals LPI support, and yeah, she's a Dummy (affectionate π
)
β¨ SYNOPSIS β¨
int ksz_phylink_mac_enable_tx_lpi (struct phylink_config *config , u32
timer , bool tx_clock_stop );
π¦ ARGUMENTS π¦
configβ the phylink config structure, she's the main character here π«Άtimerβ timer value before entering LPI. lowkey unused tho πtx_clock_stopβ whether to stop the TX clock in LPI mode. also unused, ngl π
π DESCRIPTION π
okay so what does this function do? basically it signals to phylink that the driver architecture supports LPI management, which lets phylink control EEE advertisement during negotiation according to IEEE Std 802.3 (Clause 78). slay β¨
Hardware Management of EEE/LPI State: so for KSZ switch ports with integrated PHYs (e.g., KSZ9893R ports 1-2), observation and testing suggest that the actual EEE / Low Power Idle (LPI) state transitions are managed autonomously by the hardware based on the auto-negotiation results. (not me reading the datasheet, but: while the datasheet describes EEE operation based on negotiation, it doesn't explicitly detail the internal MAC/PHY interaction, so autonomous hardware management of the MAC state for LPI is inferred from observed behavior). this hardware control, consistent with the switch's ability to operate autonomously via strapping, means MAC-level software intervention is not required or exposed for managing the LPI state once EEE is negotiated. (Ref: KSZ9893R Data Sheet DS00002420D, primarily Section 4.7.5 explaining EEE, also Sections 4.1.7 on Auto-Negotiation and 3.2.1 on Configuration Straps). the way the hardware just handles it itself?? we love a self-sufficient queen π
additionally, ports configured as MAC interfaces (e.g., KSZ9893R port 3) lack documented MAC-level LPI control. no cap, it's just not documented π
therefore, this callback performs no action and serves primarily to inform phylink of LPI awareness and to document the inferred hardware behavior. she does nothing but she ate, and honestly? that's the vibe π
β RETURN β
0 β always success, every single time. no drama, no errors, just wins π
fr fr she cannot fail. that's her whole personality.
π SEE ALSO π
Kernel file: ./drivers/net/dsa/microchip/ksz_common.c
and the whole friend group π«Ά:
ksz_phylink_mac_disable_tx_lpi(9)ksz_update_port_member(9)ksz_parent_mdio_read(9)ksz_parent_mdio_write(9)ksz_phy_addr_to_port(9)ksz_irq_phy_setup(9)ksz_irq_phy_free(9)ksz_parse_dt_phy_config(9)ksz_mdio_register(9)ksz_handle_wake_reason(9)ksz_is_port_mac_global_usable(9)ksz_get_wol(9)ksz_set_wol(9)ksz_wol_pre_shutdown(9)ksz_switch_macaddr_get(9)ksz_switch_shutdown(9)ksz_drive_strength_to_reg(9)ksz_drive_strength_error(9)ksz_drive_strength_write(9)
and that's the whole page, bestie π§ drop a π for our girl, sourced fresh from ./drivers/net/dsa/microchip, dated October 2026, and forever doing absolutely nothing on purpose. periodt.
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms