intel_set_p...un_reporting(9)

✨ NAME ✨

okay bestie, welcome to the intel_set_p...un_reporting(9) page from the Kernel API Manual 💅✨ (the header is doing its little truncation thing, but the full function is intel_set_pch_fifo_underrun_reporting). Its NAME energy is literally: set PCH fifo underrun reporting state. No cap.

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💖 SYNOPSIS 💖

bool intel_set_pch_fifo_underrun_reporting (struct intel_display
       *display , enum pipe pch_transcoder , bool enable );

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🎀 ARGUMENTS 🎀

• display — the display device instance, aka the main character of this whole display situation 💖
• pch_transcoder — the PCH transcoder, and yes it's the same as pipe on IVB and older, iykyk 🦋
• enable — whether underruns should be reported or not. That's the whole vibe check.

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🦋 DESCRIPTION 🦋

So what this function does is make us disable or enable PCH fifo underruns for a specific PCH transcoder. That's the assignment, periodt 💅

⚠️ Notice that on some PCHs (e.g. CPT/PPT), disabling FIFO underrun reporting for one transcoder may also disable all the other PCH error interruts for the other transcoders, due to the fact that there's just one interrupt mask/enable bit for all the transcoders. This is not a drill — it's giving shared-bit chaos 💀

And it returns the previous state of underrun reporting. Cute, useful, iconic ✨

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🌈 SEE ALSO 🌈

okay go check out these icons too, bestie 👑

• Kernel file ./drivers/gpu/drm/i915/display/intel_fifo_underrun.c — fifo underrun handling(9)
• intel_set_cpu_fifo_underrun_reporting(9)
• intel_cpu_fifo_underrun_irq_handler(9)
• intel_pch_fifo_underrun_irq_handler(9)
• intel_check_cpu_fifo_underruns(9)
• intel_check_pch_fifo_underruns(9)

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mwah 💋 this lil page comes from ./drivers/gpu/drm/i915/display, dated October 2026, and its header title is intel_set_p...un_reporting(9) — see u next time bestie 🫶✨🌸