intel_gt_mcr_wait_for_reg(9)

✨ intel_gt_mcr_wait_for_reg ✨

okay so this one is straight out of the Kernel API Manual, section 9, and it's genuinely one of those little functions that just sits there waiting — literally, that's the whole job. bestie, let me tell you everything 💅

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🎀 NAME 🎀

intel_gt_mcr_wait_for_reg — no cap, this is the "wait until the MCR register matches the expected state" function. that's it. that's the vibe check. ⏳

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🦋 SYNOPSIS 🦋

int intel_gt_mcr_wait_for_reg (struct intel_gt *gt , i915_mcr_reg_t reg
, u32 mask , u32 value , unsigned int fast_timeout_us , unsigned int
slow_timeout_ms );

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🌸 ARGUMENTS 🌸

• gt — the GT structure 🫶 she's the context, she's the main character
• reg — the register we're gonna read
• mask — the mask we apply to the register value (yes, we masking, we cute)
• value — the value we're waiting for, the whole point of the operation honestly
• fast_timeout_us — fast timeout, in microseconds, for the atomic/tight wait 🔥
• slow_timeout_ms — slow timeout, in milliseconds 🐢

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💖 DESCRIPTION 💖

so this routine just waits until the target register reg contains the expected value after applying the mask. i.e. it waits until:

(intel_gt_mcr_read_any_fw(gt, reg) & mask) == value

and if that never happens? the wait will timeout after slow_timeout_ms milliseconds. periodt. 💀

for atomic context, slow_timeout_ms must be zero and fast_timeout_us must be not larger than 20,0000 microseconds — yeah, that's the number, not me, write it down bestie 🫶

this function is basically an MCR-friendly version of __intel_wait_for_register_fw. generally it'll only be used on GAM registers, which are a bit special — not me being dramatic, that's the doc's words 😭 — because although they're MCR registers, reads (e.g., waiting for status updates) are always directed to the primary instance.

⚠️ note that this routine assumes the caller holds forcewake asserted. it is not suitable for very long waits. so like… don't camp out here, it's a short-stay situation 🙈

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🧚 CONTEXT 🧚

calls a function that takes and releases gt->mcr_lock. so she's locking, she's unlocking, she's doing the whole routine — iconic behavior 💅

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👑 RETURN 👑

0 if the register matches the desired condition, or -ETIMEDOUT. that's the whole personality: yes or time's-up ⭐

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🌈 SEE ALSO 🌈

• Kernel file ./drivers/gpu/drm/i915/gt/intel_gt_mcr.c
• GT Multicast/Replicated (MCR) Register Support(9)
• intel_gt_mcr_lock(9)
• intel_gt_mcr_unlock(9)
• intel_gt_mcr_lock_sanitize(9)
• intel_gt_mcr_read(9)
• intel_gt_mcr_unicast_write(9)
• intel_gt_mcr_multicast_write(9)
• intel_gt_mcr_multicast_write_fw(9)
• intel_gt_mcr_multicast_rmw(9)
• intel_gt_mcr_get_nonterminated_steering(9)
• intel_gt_mcr_read_any_fw(9)
• intel_gt_mcr_read_any(9)
• intel_gt_mcr_get_ss_steering(9)

like, the whole MCR friend group, honestly — go say hi to all of them 🦋

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and that's the page, bestie 🎀 this lil gem lives at ./drivers/gpu/drm/i915/gt, stamped October 2026 — mwah, go wait on some registers, love u 💜🌸