intel_fbc_ha...underrun_irq(9)

✨ intel_fbc_handle_fifo_underrun_irq ✨

okay bestie so this is a page from the Kernel API Manual, section 9, and yes the title up top is literally rendered as intel_fbc_ha...underrun_irq(9) because even manpage generators have to truncate sometimes 😭 but the full name is right here, we're gonna get through it together 💖

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💅 NAME

intel_fbc_handle_fifo_underrun_irq — disable FBC when we get a FIFO underrun

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🎀 SYNOPSIS

void intel_fbc_handle_fifo_underrun_irq (struct intel_display *display);

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🦋 ARGUMENTS

• display — display. that's it. that's the whole description. the docs said "display" and then just… said "display" again 💀 iconic minimalism honestly, no further notes given, so we move on 🫶

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🌸 DESCRIPTION

okay so picture this. Without FBC, most underruns are harmless — they don't really cause too many problems, except for an annoying little message showing up on dmesg. lowkey just noise. 🙈

But with FBC? different story entirely. underruns can become black screens or even worse, especially when they're paired with bad watermarks. so in order for us to be on the safe side, we completely disable FBC in case we ever detect a FIFO underrun on any pipe. and like, an underrun on any pipe already suggests that the watermarks may be bad, so we try to be as safe as possible. safety girl summer 🔥

bestie note: this function is called from the IRQ handler. that's the vibe check. not a normal code path, it's the interrupt one ✨

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🌈 SEE ALSO

• Kernel file ./drivers/gpu/drm/i915/display/intel_fbc.c
• Frame Buffer Compression (FBC)(9)
• intel_fbc_disable(9)
• intel_fbc_read_underrun_dbg_info(9)
• intel_fbc_init(9)
• intel_fbc_sanitize(9)

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and that's the whole page, bestie, you ate that 🍓 this one lives in ./drivers/gpu/drm/i915/display and the date on the tin is October 2026 — so go forth, disable that FBC, protect those pipes, and remember: no bad watermarks allowed in this group chat 💜✨👑