i915_gem_ob...t_17_swizzle(9)

💅 i915_gem_ob...t_17_swizzle(9) 💅

okay so bestie, before we get into it — this is a page from the Kernel API Manual, and the star of the show is i915_gem_object_do_bit_17_swizzle ✨ (the title up top gets truncated to i915_gem_ob...t_17_swizzle(9) because, like, headers have a character limit and we respect it 🎀).

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🌸 NAME 🌸

i915_gem_object_do_bit_17_swizzle — the little fixup that handles bit 17 swizzling 🫶

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⭐ SYNOPSIS ⭐

void i915_gem_object_do_bit_17_swizzle (struct drm_i915_gem_object *obj
, struct sg_table *pages );

that's the whole signature, no cap. two args, void return, and it's giving "quietly essential" 🔥

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🦋 ARGUMENTS 🦋

• obj — the i915 GEM buffer object in question 💖 like, the actual thing we're fixing up.
• pages — the scattergather list of physical pages 🧚 this is the physical-page receipts.

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👑 DESCRIPTION 👑

so here's the vibe: this function fixes up the swizzling in case any page frame number for this object has changed in bit 17 since that state was saved with i915_gem_object_save_bit_17_swizzle 💫

it gets called when pinning backing storage again, and the reason is honestly so real of the kernel: unpinned backing storage is free to move around 😭 either by directly moving pages or by swapping them out and back in again. bit 17 does not stay put, bestie. so we re-check and we fix.

🌈 key takeaway: save the state → stuff moves → come back → run this → swizzling is correct again. periodt.

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💀 SEE ALSO 💀

• Kernel file ./drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c fence register handling(9)
• i915_vma_revoke_fence(9)
• i915_vma_pin_fence(9)
• i915_reserve_fence(9)
• i915_unreserve_fence(9)
• intel_ggtt_restore_fences(9)
• tiling swizzling details(9)
• detect_bit_6_swizzle(9)
• i915_gem_object_save_bit_17_swizzle(9)

like, the whole fence-register friend group 🫶 go read them, iykyk.

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mwah 💋 that's the page!! sourced from ./drivers/gpu/drm/i915/gt, dated October 2026, and filed under i915_gem_ob...t_17_swizzle(9) — slay, bye 👋💜