GATED FIXED CLOCK, CONTROLLED WITH A GPIO OUTPUT AND A REGULATOR(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ¦‹ gated fixed ... a regulator(9) πŸ¦‹

okay bestie, welcome to the Kernel API Manual page for gated fixed ... a regulator(9) β€” aka the whole gated fixed clock, controlled with a gpio output and a regulator situation. it's giving very specific clock energy and i'm obsessed. 🫢✨

✨ NAME ✨

gated fixed clock, controlled with a gpio output and a regulator

Traits of this clock, no cap:

  • prepare β€” clk_prepare and clk_unprepare are function & control regulator, optionally a gpio that can sleep. 😴
  • enable β€” clk_enable and clk_disable are functional & control gpio. ⚑
  • rate β€” rate is fixed and set on clock registration. πŸ”’
  • parent β€” fixed clock is a root clock and has no parent. πŸ‘‘
bestie note: yes, these are the exact trait vibes β€” prepare, enable, rate, and parent, all accounted for. πŸ’…

πŸ‘€ SEE ALSO πŸ‘€

  • Kernel file ./drivers/clk/clk-gpio.c
  • basic gpio gated clock which can be enabled and disabled(9)
  • struct clk_gpio(9)
  • basic clock multiplexer which can be controlled with a gpio output(9)
  • struct clk_gated_fixed(9)

made with πŸ’– from the ./drivers/clk source and dated October 2026 β€” gated fixed ... a regulator(9) out. 🫢🌈

πŸ“¦ where this page comes from