ENUM VIRTIO_PCIDEV_OPS(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

🌸 enum virtio_pcidev_ops(9) β€” bestie's guide to the virtual PCI device ops πŸ’…

Okay so this is the <pink>enum virtio_pcidev_ops</pink> page from the Kernel API Manual, and honestly? It's giving "the entire vocabulary a virtual PCI device can speak." Every message type it can send or receive lives here. Let's get into it. ✨


✨ SYNOPSIS ✨

enum virtio_pcidev_ops {
    VIRTIO_PCIDEV_OP_RESERVED ,
    VIRTIO_PCIDEV_OP_CFG_READ ,
    VIRTIO_PCIDEV_OP_CFG_WRITE ,
    VIRTIO_PCIDEV_OP_MMIO_READ ,
    VIRTIO_PCIDEV_OP_MMIO_WRITE ,
    VIRTIO_PCIDEV_OP_MMIO_MEMSET ,
    VIRTIO_PCIDEV_OP_INT ,
    VIRTIO_PCIDEV_OP_MSI ,
    VIRTIO_PCIDEV_OP_PME

};

πŸŽ€ Constants β€” the whole squad πŸŽ€

So these are all the possible ops, and each one is a different vibe of message. Here we go, no cap:

  • VIRTIO_PCIDEV_OP_RESERVED β€” literally just sitting there to catch errors. It's the designated driver of this enum. πŸ™ˆ
  • VIRTIO_PCIDEV_OP_CFG_READ β€” read config space. The size is 1, 2, 4 or 8, and the data field should be filled in by the device, in little endian.
  • VIRTIO_PCIDEV_OP_CFG_WRITE β€” write config space. Same size situation: 1, 2, 4 or 8. The data field contains the data to write, in little endian.
  • VIRTIO_PCIDEV_OP_MMIO_READ β€” read BAR mem/pio. size can be variable here (not just the config-space sizes, watch out πŸ‘€). The data field should be filled in by the device, in little endian.
  • VIRTIO_PCIDEV_OP_MMIO_WRITE β€” write BAR mem/pio. size can be variable. The data field contains the data to write, in little endian.
  • VIRTIO_PCIDEV_OP_MMIO_MEMSET β€” memset MMIO. size is variable, BUT the data field only has one byte β€” unlike VIRTIO_PCIDEV_OP_MMIO_WRITE. Don't mix them up bestie, they are NOT the same. 😭
  • VIRTIO_PCIDEV_OP_INT β€” legacy INTx# pin interrupt. The addr field is 1-4 for the number. Old-school but iconic.
  • VIRTIO_PCIDEV_OP_MSI β€” MSI(-X) interrupt. This message basically transports the 16- or 32-bit write that would otherwise be done into memory β€” analogous to the write messages (VIRTIO_PCIDEV_OP_MMIO_WRITE) above. iykyk πŸ”₯
  • VIRTIO_PCIDEV_OP_PME β€” a dummy message whose content is ignored (and should be all zeroes) to signal the PME# pin. It's literally just there to say "hey, PME# happened" and nothing else. 🫢

🌈 SEE ALSO 🌈

  • Kernel file ./include/uapi/linux/virtio_pcidev.h
  • struct virtio_pcidev_msg(9)

And that's the page, bestie! πŸ¦‹ This gem lives at ./include/uapi/linux and the date on it is October 2026. Go forth and speak fluent virtio PCI device ops β€” periodt. πŸ‘‘πŸ’–

πŸ“¦ where this page comes from