ENUM RZG3S_SYSC_LINK_MODE(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

okay so bestie, welcome to the Kernel API Manual entry for enum rzg3s_sysc_link_mode(9) β€” the enum that tells your PCIe link how to configure itself. literally just two modes, but they're both iconic in their own way. πŸ¦‹


✨ NAME ✨

enum rzg3s_sysc_link_mode β€” PCIe link configuration modes, periodt. that's the whole thing. no cap. πŸ’…


🌸 SYNOPSIS 🌸

like, here's the shape of it, bestie β€” copy it exactly, don't @ me:

enum rzg3s_sysc_link_mode {
    RZG3S_SYSC_LINK_MODE_SINGLE_X4 ,
    RZG3S_SYSC_LINK_MODE_DUAL_X2

};

(yeah there's a lil blank line in there, it's giving dramatic pause 😭 keep it.)


πŸŽ€ Constants πŸŽ€

the two options, and honestly? both ate. πŸ”₯

  • RZG3S_SYSC_LINK_MODE_SINGLE_X4 β€” single port, x4 lanes. one port living its best main character life with all four lanes to itself. πŸ‘‘
  • RZG3S_SYSC_LINK_MODE_DUAL_X2 β€” dual ports, x2 lanes each. two ports, sharing the lane love equally. friendship energy fr fr. 🫢

πŸ¦‹ SEE ALSO πŸ¦‹

if you're gonna go down this rabbit hole (and you will πŸ‡), here's the whole squad:

  • the kernel file ./drivers/pci/controller/pcie-rzg3s-host.c
  • struct rzg3s_sysc_function(9)
  • enum rzg3s_sysc_func_id(9)
  • struct rzg3s_sysc_info(9)
  • struct rzg3s_sysc(9)
  • struct rzg3s_pcie_msi(9)
  • enum rzg3s_pcie_controller_id(9)
  • struct rzg3s_pcie_soc_data(9)
  • struct rzg3s_pcie_port(9)
  • struct rzg3s_pcie_host(9)

that's a lot of structs and i'm obsessed with every single one. 🌈✨


ok that's the whole page bestie, go forth and configure those lanes πŸ’–

later, bestie!! this one came out of ./drivers/pci/controller, dated October 2026, and it's still filed under enum rzg3s_sysc_link_mode(9) if you ever need to find it again πŸŽ€πŸŒΈ

πŸ“¦ where this page comes from