ENUM PHY_INTERFACE_T(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

🌸 enum phy_interface_t(9) 🌸

okay bestie, this is the enum phy_interface_t(9) page from the Kernel API Manual β€” it's basically the master list of every mode a MAC↔PHY interface can vibe in πŸ’…


✨ NAME ✨

enum phy_interface_t β€” the Interface Mode definitions, aka the whole roster of interface flavors πŸŽ€


✨ SYNOPSIS ✨

enum phy_interface_t {
    PHY_INTERFACE_MODE_NA ,
    PHY_INTERFACE_MODE_INTERNAL ,
    PHY_INTERFACE_MODE_MII ,
    PHY_INTERFACE_MODE_GMII ,
    PHY_INTERFACE_MODE_SGMII ,
    PHY_INTERFACE_MODE_TBI ,
    PHY_INTERFACE_MODE_REVMII ,
    PHY_INTERFACE_MODE_RMII ,
    PHY_INTERFACE_MODE_REVRMII ,
    PHY_INTERFACE_MODE_RGMII ,
    PHY_INTERFACE_MODE_RGMII_ID ,
    PHY_INTERFACE_MODE_RGMII_RXID ,
    PHY_INTERFACE_MODE_RGMII_TXID ,
    PHY_INTERFACE_MODE_RTBI ,
    PHY_INTERFACE_MODE_SMII ,
    PHY_INTERFACE_MODE_XGMII ,
    PHY_INTERFACE_MODE_XLGMII ,
    PHY_INTERFACE_MODE_MOCA ,
    PHY_INTERFACE_MODE_PSGMII ,
    PHY_INTERFACE_MODE_QSGMII ,
    PHY_INTERFACE_MODE_TRGMII ,
    PHY_INTERFACE_MODE_100BASEX ,
    PHY_INTERFACE_MODE_1000BASEX ,
    PHY_INTERFACE_MODE_2500BASEX ,
    PHY_INTERFACE_MODE_5GBASER ,
    PHY_INTERFACE_MODE_RXAUI ,
    PHY_INTERFACE_MODE_XAUI ,
    PHY_INTERFACE_MODE_10GBASER ,
    PHY_INTERFACE_MODE_25GBASER ,
    PHY_INTERFACE_MODE_USXGMII ,
    PHY_INTERFACE_MODE_10GKR ,
    PHY_INTERFACE_MODE_QUSGMII ,
    PHY_INTERFACE_MODE_1000BASEKX ,
    PHY_INTERFACE_MODE_10G_QXGMII ,
    PHY_INTERFACE_MODE_50GBASER ,
    PHY_INTERFACE_MODE_LAUI ,
    PHY_INTERFACE_MODE_100GBASEP ,
    PHY_INTERFACE_MODE_MIILITE ,
    PHY_INTERFACE_MODE_MAX

};

πŸ’– Constants πŸ’–

like. every single one. no skipping, we're doing the whole list bestie 😀

  • PHY_INTERFACE_MODE_NA β€” Not Applicable β€” don't touch πŸ™ˆ
  • PHY_INTERFACE_MODE_INTERNAL β€” no interface at all, MAC and PHY are combined 🫢
  • PHY_INTERFACE_MODE_MII β€” Media-independent interface
  • PHY_INTERFACE_MODE_GMII β€” Gigabit media-independent interface
  • PHY_INTERFACE_MODE_SGMII β€” Serial gigabit media-independent interface
  • PHY_INTERFACE_MODE_TBI β€” Ten Bit Interface
  • PHY_INTERFACE_MODE_REVMII β€” Reverse Media Independent Interface
  • PHY_INTERFACE_MODE_RMII β€” Reduced Media Independent Interface
  • PHY_INTERFACE_MODE_REVRMII β€” Reduced Media Independent Interface in PHY role
  • PHY_INTERFACE_MODE_RGMII β€” Reduced gigabit media-independent interface
  • PHY_INTERFACE_MODE_RGMII_ID β€” RGMII with Internal RX+TX delay
  • PHY_INTERFACE_MODE_RGMII_RXID β€” RGMII with Internal RX delay
  • PHY_INTERFACE_MODE_RGMII_TXID β€” RGMII with Internal TX delay
  • PHY_INTERFACE_MODE_RTBI β€” Reduced TBI
  • PHY_INTERFACE_MODE_SMII β€” Serial MII
  • PHY_INTERFACE_MODE_XGMII β€” 10 gigabit media-independent interface
  • PHY_INTERFACE_MODE_XLGMII β€” 40 gigabit media-independent interface
  • PHY_INTERFACE_MODE_MOCA β€” Multimedia over Coax
  • PHY_INTERFACE_MODE_PSGMII β€” Penta SGMII
  • PHY_INTERFACE_MODE_QSGMII β€” Quad SGMII
  • PHY_INTERFACE_MODE_TRGMII β€” Turbo RGMII
  • PHY_INTERFACE_MODE_100BASEX β€” 100 BaseX
  • PHY_INTERFACE_MODE_1000BASEX β€” 1000 BaseX
  • PHY_INTERFACE_MODE_2500BASEX β€” 2500 BaseX
  • PHY_INTERFACE_MODE_5GBASER β€” 5G BaseR
  • PHY_INTERFACE_MODE_RXAUI β€” Reduced XAUI
  • PHY_INTERFACE_MODE_XAUI β€” 10 Gigabit Attachment Unit Interface
  • PHY_INTERFACE_MODE_10GBASER β€” 10G BaseR
  • PHY_INTERFACE_MODE_25GBASER β€” 25G BaseR
  • PHY_INTERFACE_MODE_USXGMII β€” Universal Serial 10GE MII
  • PHY_INTERFACE_MODE_10GKR β€” 10GBASE-KR - with Clause 73 AN
  • PHY_INTERFACE_MODE_QUSGMII β€” Quad Universal SGMII
  • PHY_INTERFACE_MODE_1000BASEKX β€” 1000Base-KX - with Clause 73 AN
  • PHY_INTERFACE_MODE_10G_QXGMII β€” 10G-QXGMII - 4 ports over 10G USXGMII
  • PHY_INTERFACE_MODE_50GBASER β€” 50GBase-R - with Clause 134 FEC
  • PHY_INTERFACE_MODE_LAUI β€” 50 Gigabit Attachment Unit Interface
  • PHY_INTERFACE_MODE_100GBASEP β€” 100GBase-P - with Clause 134 FEC
  • PHY_INTERFACE_MODE_MIILITE β€” MII-Lite - MII without RXER TXER CRS COL
  • PHY_INTERFACE_MODE_MAX β€” Book keeping

πŸ¦‹ Description πŸ¦‹

So what does this whole thing even do? It describes the interface between the MAC and the PHY. that's it, that's the vibe ✨


🌈 SEE ALSO 🌈

Kernel file ./include/linux/phy.h β€” and now the extended fam, all of them, in order, no cap:

phy_modes(9), rgmii_clock(9), struct mdio_bus_stats(9), struct mii_bus(9), mdiobus_alloc(9), enum phy_state(9), struct phy_c45_device_ids(9), struct phy_oatc14_sqi_capability(9), struct phy_device(9), struct phy_tdr_config(9), enum link_inband_signalling(9), struct phy_plca_cfg(9), struct phy_plca_status(9), struct phy_led(9), struct phy_mse_capability(9), struct phy_mse_snapshot(9), struct phy_driver(9), phy_id_compare(9), phy_id_compare_vendor(9), phy_id_compare_model(9), phydev_id_compare(9), phy_is_started(9), phy_driver_is_genphy(9), phy_disable_eee_mode(9), phy_can_wakeup(9), phy_may_wakeup(9), phy_read(9), __phy_read(9), phy_write(9), __phy_write(9), __phy_modify_changed(9), phy_read_mmd_poll_timeout(9), __phy_set_bits(9), __phy_clear_bits(9), phy_set_bits(9), phy_clear_bits(9), __phy_set_bits_mmd(9), __phy_clear_bits_mmd(9), phy_set_bits_mmd(9), phy_clear_bits_mmd(9), phy_interrupt_is_valid(9), phy_polling_mode(9), phy_has_hwtstamp(9), phy_has_rxtstamp(9), phy_has_tsinfo(9), phy_has_txtstamp(9), phy_is_default_hwtstamp(9), phy_on_sfp(9), phy_interface_mode_is_rgmii(9), phy_interface_mode_is_8023z(9), phy_interface_is_rgmii(9), phy_is_pseudo_fixed_link(9), phy_module_driver(9)


that's the whole page bestie, go forth and pick your interface mode πŸ’…βœ¨

and that's a wrap!! this one came out of ./include/linux, dated October 2026, page enum phy_interface_t(9) β€” mwah, love u, bye πŸŽ€πŸ’–πŸ¦‹

πŸ“¦ where this page comes from