ENUM IRQ_GC_FLAGS(9)
π enum irq_gc_flags(9) π
okay so welcome to the Kernel API Manual, bestie β this is literally the page for enum irq_gc_flags, and no cap it's a tiny one but it's important, so stay with me π«Ά
β¨ NAME β¨
enum irq_gc_flags β the initialization flags for generic irq chips πΈ
π¦ SYNOPSIS π¦
enum irq_gc_flags {
IRQ_GC_INIT_MASK_CACHE ,
IRQ_GC_INIT_NESTED_LOCK ,
IRQ_GC_MASK_CACHE_PER_TYPE ,
IRQ_GC_NO_MASK ,
IRQ_GC_BE_IO
};
that's the whole enum, bestie β five constants, one vibe check, we go through each one below π
π Constants π
IRQ_GC_INIT_MASK_CACHEβ this one says: initialize themask_cacheby reading the mask reg. like, go actually look at the register, don't guess πIRQ_GC_INIT_NESTED_LOCKβ sets the lock class of the irqs to nested, and it's for irq chips that need to callirq_set_wakeon the parent irq. usually that's GPIO implementations (iykyk) π₯IRQ_GC_MASK_CACHE_PER_TYPEβ the mask cache is chip type private here. per type, not shared, periodt πIRQ_GC_NO_MASKβ do not calculateirq_data->mask. literally just don't πIRQ_GC_BE_IOβ use big-endian register accesses. and yeah, the default is LE (little-endian), so this flag is you opting out of the default π
π SEE ALSO π
if you wanna go deeper (and you do, bestie), check out the Kernel file ./include/linux/irq.h, plus these absolute icons:
struct irq_common_data(9)struct irq_data(9)struct irq_chip(9)struct irq_chip_regs(9)struct irq_chip_type(9)struct irq_chip_generic(9)struct irq_domain_chip_generic_info(9)
okay that's the whole thing, you ate that π this page lives in ./include/linux, it's the October 2026 edition, and it's filed under enum irq_gc_flags(9) β mwah, go read some irq code, ily πβ¨
π¦ where this page comes from
- nixpkgs unstable: linux-manual 7.3.1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms