ENUM IRQ_GC_FLAGS(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… enum irq_gc_flags(9) πŸ’…

okay so welcome to the Kernel API Manual, bestie β€” this is literally the page for enum irq_gc_flags, and no cap it's a tiny one but it's important, so stay with me 🫢


✨ NAME ✨

enum irq_gc_flags β€” the initialization flags for generic irq chips 🌸


πŸ¦‹ SYNOPSIS πŸ¦‹

enum irq_gc_flags {
    IRQ_GC_INIT_MASK_CACHE ,
    IRQ_GC_INIT_NESTED_LOCK ,
    IRQ_GC_MASK_CACHE_PER_TYPE ,
    IRQ_GC_NO_MASK ,
    IRQ_GC_BE_IO

};

that's the whole enum, bestie β€” five constants, one vibe check, we go through each one below πŸ‘‘


πŸŽ€ Constants πŸŽ€

  • IRQ_GC_INIT_MASK_CACHE β€” this one says: initialize the mask_cache by reading the mask reg. like, go actually look at the register, don't guess πŸ’–
  • IRQ_GC_INIT_NESTED_LOCK β€” sets the lock class of the irqs to nested, and it's for irq chips that need to call irq_set_wake on the parent irq. usually that's GPIO implementations (iykyk) πŸ”₯
  • IRQ_GC_MASK_CACHE_PER_TYPE β€” the mask cache is chip type private here. per type, not shared, periodt πŸ’…
  • IRQ_GC_NO_MASK β€” do not calculate irq_data->mask. literally just don't πŸ™ˆ
  • IRQ_GC_BE_IO β€” use big-endian register accesses. and yeah, the default is LE (little-endian), so this flag is you opting out of the default 🌈

🌟 SEE ALSO 🌟

if you wanna go deeper (and you do, bestie), check out the Kernel file ./include/linux/irq.h, plus these absolute icons:

  • struct irq_common_data(9)
  • struct irq_data(9)
  • struct irq_chip(9)
  • struct irq_chip_regs(9)
  • struct irq_chip_type(9)
  • struct irq_chip_generic(9)
  • struct irq_domain_chip_generic_info(9)

okay that's the whole thing, you ate that πŸ“ this page lives in ./include/linux, it's the October 2026 edition, and it's filed under enum irq_gc_flags(9) β€” mwah, go read some irq code, ily πŸ’œβœ¨

πŸ“¦ where this page comes from