drm_dp_dual...x_tmds_clock(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… drm_dp_dual_mode_max_tmds_clock β€” a Kernel API Manual moment πŸŽ€

okay bestie, so this is a page straight out of the Kernel API Manual, and it's about one (1) very specific little function that asks a DisplayPort dual-mode adaptor "hey girl, how fast can you go?" ✨


🌸 NAME 🌸

drm_dp_dual_mode_max_tmds_clock β€” literally just: the max TMDS clock for a DP dual mode adaptor πŸ’–


πŸ¦‹ SYNOPSIS πŸ¦‹

int drm_dp_dual_mode_max_tmds_clock (const struct drm_device *dev , enum
drm_dp_dual_mode_type type , struct i2c_adapter *adapter );

✨ ARGUMENTS ✨

  • dev β€” the drm_device you're rolling with 🫢
  • type β€” which flavour of DP dual mode adaptor we're dealing with πŸ‘‘
  • adapter β€” the I2C adapter for the DDC bus, that's the road we talk down πŸ›£οΈ

πŸ’œ DESCRIPTION πŸ’œ

So the whole vibe here is: figure out the max TMDS clock the adaptor can handle. And how do we figure it out? It depends on the type of the dual mode adaptor, plus the DP_DUAL_MODE_MAX_TMDS_CLOCK register β€” but only on type2 adaptors, bestie. πŸ‘€

Now here's the plot twist 😭 β€” some type 1 adaptors have problems with registers (go read the comments in drm_dp_dual_mode_detect, they spill the tea). So on those we do not read the register at all. Instead we just simply assume a 165 MHz limit, based on the specification. No cap, that's the move. πŸ’…


🌈 RETURN 🌈

The maximum supported TMDS clock rate for the DP dual mode adaptor, in kHz. That's it, that's the answer πŸŽ€


⭐ SEE ALSO ⭐


and that's the whole page, bestie 🫢 this cutie lives in ./drivers/gpu/drm/display, and it was dated October 2026 β€” so yeah, mark your calendar, the kernel said what it said πŸ’€βœ¨

πŸ“¦ where this page comes from