dm_test_nv_s..._unsupported(9)

💻 dm_test_nv_s..._unsupported(9) — kernel API manual, section 9, bestie edition ✨

okay so real talk, this is a section 9 kernel API page — that's the "kernel internals / functions" shelf of the manual, and the function's full government name is dm_test_nv_set_display_count_unsupported. it's a KUnit test. it's a little guy. it tests one single thing and it tests it immaculately. 💅

---

🎀 NAME 🎀

dm_test_nv_set_display_count_unsupported — the test that checks the EOPNOTSUPP mapping, no cap 🫶

---

🌸 SYNOPSIS 🌸

void dm_test_nv_set_display_count_unsupported (struct kunit *test );

like, that's it. that's the whole signature. she's compact.

---

🦋 ARGUMENTS 🦋

• test — the KUnit test context, i.e. the little bag of test-runner info the framework hands you. she's just passing through 💖

---

✨ DESCRIPTION ✨

okay so here's the vibe check 🔥: this test verifies that pp_nv_set_display_count returns PP_SMU_RESULT_UNSUPPORTED when the DPM callback returns -EOPNOTSUPP. that's the whole bit. you make the callback say "sorry babe, not supported," and the function is supposed to translate that into PP_SMU_RESULT_UNSUPPORTED — and this test makes sure it actually does. it's giving "boundary condition, but make it fashion." 💀

literally, if that mapping ever broke, this test would be on the floor screaming. iconic behavior honestly.

---

👑 SEE ALSO 👑

buckle up bestie, this is the long part. the whole AMD display PP/SMU test suite is one big friend group and they all @ each other. 💜

🧚 the kernel file itself

• ./drivers/gpu/drm/amd/display/amdgpu_dm/tests/amdgpu_dm_pp_smu_test.c — the kernel file where all of this lives, the mothership 🌈

🍓 the stub squad

• struct stub_dpm_context(9)
• setup_stub_dpm(9)

⭐ default clock levels

• dm_test_default_clock_levels_display(9)
• dm_test_default_clock_levels_engine(9)
• dm_test_default_clock_levels_memory(9)
• dm_test_default_clock_levels_unknown(9)

💫 dc_to_pp clock type translation, the whole family

• dm_test_dc_to_pp_clock_type_display(9)
• dm_test_dc_to_pp_clock_type_engine(9)
• dm_test_dc_to_pp_clock_type_memory(9)
• dm_test_dc_to_pp_clock_type_dcefclk(9)
• dm_test_dc_to_pp_clock_type_dcfclk(9)
• dm_test_dc_to_pp_clock_type_pixelclk(9)
• dm_test_dc_to_pp_clock_type_fclk(9)
• dm_test_dc_to_pp_clock_type_phyclk(9)
• dm_test_dc_to_pp_clock_type_dppclk(9)
• dm_test_dc_to_pp_clock_type_invalid(9)

🌸 pp_to_dc clock levels

• dm_test_pp_to_dc_clock_levels_within_limit(9)
• dm_test_pp_to_dc_clock_levels_caps_at_max(9)
• dm_test_pp_to_dc_clock_levels_latency_within_limit(9)
• dm_test_pp_to_dc_clock_levels_latency_caps_at_max(9)
• dm_test_pp_to_dc_clock_levels_voltage_within_limit(9)
• dm_test_pp_to_dc_clock_levels_voltage_caps_at_max(9)

🔥 the get_funcs crew

• dm_test_get_funcs_rv(9)
• dm_test_get_funcs_rv_101(9)
• dm_test_get_funcs_nv(9)
• dm_test_get_funcs_rn(9)
• dm_test_get_funcs_unsupported(9)

💅 display requirements & clock-for-voltage (the early ones)

• dm_test_apply_display_requirements_dpm_disabled(9)
• dm_test_apply_clock_for_voltage_invalid_type(9)

🦋 the builders

• dm_test_build_pm_display_cfg_scalar_fields(9)
• dm_test_build_pm_display_cfg_per_display(9)
• dm_test_build_wm_clock_ranges_dmif(9)
• dm_test_build_wm_clock_ranges_mcif(9)

🎀 cap_clock_levels girlies

• dm_test_cap_clock_levels_engine_caps(9)
• dm_test_cap_clock_levels_engine_first_exceeds(9)
• dm_test_cap_clock_levels_memory_caps(9)
• dm_test_cap_clock_levels_within_limit(9)
• dm_test_cap_clock_levels_other_type(9)

🌈 nv clock id besties

• dm_test_nv_clock_id_dispclk(9)
• dm_test_nv_clock_id_phyclk(9)
• dm_test_nv_clock_id_pixelclk(9)
• dm_test_nv_clock_id_invalid(9)

💖 display requirements enabled + get_clock_levels

• dm_test_apply_display_requirements_dpm_enabled(9)
• dm_test_get_clock_levels_by_type_dpm_error(9)
• dm_test_get_clock_levels_by_type_success(9)
• dm_test_get_clock_levels_by_type_validation_fallback(9)
• dm_test_get_clock_levels_with_latency_success(9)
• dm_test_get_clock_levels_with_latency_failure(9)
• dm_test_get_clock_levels_with_voltage_success(9)
• dm_test_get_clock_levels_with_voltage_failure(9)

🧚 notify_wm_clock_changes

• dm_test_notify_wm_clock_changes_polaris(9)
• dm_test_notify_wm_clock_changes_non_polaris(9)

⭐ apply_clock_for_voltage

• dm_test_apply_clock_for_voltage_success(9)
• dm_test_apply_clock_for_voltage_eopnotsupp(9)
• dm_test_apply_clock_for_voltage_fail(9)

💜 nv set_display_count — hey, that's our girl's siblings!

• dm_test_nv_set_display_count_ok(9)
• dm_test_nv_set_display_count_fail(9)

🍓 nv voltage by freq + pstate handshake

• dm_test_nv_set_voltage_by_freq_ok(9)
• dm_test_nv_set_voltage_by_freq_invalid_id(9)
• dm_test_nv_pstate_handshake_ok(9)
• dm_test_nv_pstate_handshake_fail(9)

🦋 rn get_dpm_clock_table

• dm_test_rn_get_dpm_clock_table_ok(9)
• dm_test_rn_get_dpm_clock_table_unsupported(9)
• dm_test_rn_get_dpm_clock_table_fail(9)

🌸 rv crew

• dm_test_rv_set_wm_ranges(9)
• dm_test_rv_set_pme_wa_enable(9)
• dm_test_rv_set_active_display_count(9)
• dm_test_rv_set_min_deep_sleep_dcfclk(9)
• dm_test_rv_set_hard_min_dcefclk_by_freq(9)
• dm_test_rv_set_hard_min_fclk_by_freq(9)

🔥 nv watermarks + minimum clocks

• dm_test_nv_set_wm_ranges(9)
• dm_test_nv_set_min_deep_sleep_dcfclk_ok(9)
• dm_test_nv_set_min_deep_sleep_dcfclk_unsupported(9)
• dm_test_nv_set_min_deep_sleep_dcfclk_fail(9)
• dm_test_nv_set_hard_min_dcefclk_ok(9)
• dm_test_nv_set_hard_min_dcefclk_unsupported(9)
• dm_test_nv_set_hard_min_dcefclk_fail(9)
• dm_test_nv_set_hard_min_uclk_ok(9)
• dm_test_nv_set_hard_min_uclk_unsupported(9)
• dm_test_nv_set_hard_min_uclk_fail(9)

👑 nv max sustainable clocks + uclk dpm states

• dm_test_nv_get_max_sustainable_clocks_ok(9)
• dm_test_nv_get_max_sustainable_clocks_unsupported(9)
• dm_test_nv_get_max_sustainable_clocks_fail(9)
• dm_test_nv_get_uclk_dpm_states_ok(9)
• dm_test_nv_get_uclk_dpm_states_unsupported(9)
• dm_test_nv_get_uclk_dpm_states_fail(9)

💫 and one (1) default

• dm_test_smu_write_watermarks_table_default(9)

---

and that's the whole group chat, fr fr. 🫶

---

ngl bestie, that SEE ALSO list is a lot of tests — if you're poking at the PP/SMU code, this is basically the entire test neighborhood, so you might as well say hi to all of them. 😭

---

sign-off time 🎀 this page ships from ./drivers/gpu/drm/amd/display/... and it's dated October 2026 — so yeah, future-dated manual page, main character energy only. 💅✨