clk_register_divider_table(9)

✨ clk_register_divider_table ✨

okay bestie, welcome to the Kernel API Manual page for clk_register_divider_table — it’s literally “register a table based divider clock with the clock framework,” and we’re gonna go through every single arg together. no cap, nothing skipped 💖

💖 NAME 💖

clk_register_divider_table — register a table based divider clock with the clock framework. iconic clock-framework behavior, lowkey essential. 🎀

🦋 SYNOPSIS 🦋

okay so the whole call looks exactly like this, character for character:

struct clk * clk_register_divider_table (struct device *dev , const char *name , const char *parent_name , unsigned long flags , void __iomem *reg , u8 shift , u8 width , unsigned long clk_divider_flags , const struct clk_div_table *table , spinlock_t *lock );

🫶 ARGUMENTS 🫶

• dev — device registering this clock. main character device energy.
• name — name of this clock. give it a cute little identity, bestie.
• parent_name — name of clock’s parent. family tree moment.
• flags — framework-specific flags. framework says what it says.
• reg — register address to adjust divider. this is the spot we’re messing with.
• shift — number of bits to shift the bitfield. bitfield shifting, very demure.
• width — width of the bitfield. how wide the bitfield is, periodt.
• clk_divider_flags — divider-specific flags for this clock. divider-specific, not framework-specific — important distinction, iykyk.
• table — array of divider/value pairs ending with a div set to 0. don’t forget that div set to 0 ending, fr fr.
• lock — shared register lock for this clock. shared register lock, keep it locked bestie.

🌈 SEE ALSO 🌈

peep the kernel file ./drivers/clk/clk-divider.c and also clk_hw_unregister_divider(9) — go browse, it’s giving related lore. 🦋

🎀 that’s the whole page, bestie! source/version: ./drivers/clk; date: October 2026. now go register that table based divider clock and slay 💅✨