axienet_star...it_dmaengine(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… NAME πŸ’…

axienet_start_xmit_dmaengine β€” starts the transmission, bestie. That's it, that's the job ✨

This little icon lives in the Kernel API Manual, and honestly? She's kind of a big deal in the networking department πŸŽ€


🌸 SYNOPSIS 🌸

netdev_tx_t axienet_start_xmit_dmaengine (struct sk_buff *skb , struct
net_device *ndev );

πŸ¦‹ ARGUMENTS πŸ¦‹

  • skb β€” a sk_buff pointer that contains the data to be Txed πŸ’Œ like, this is the actual payload she's about to yeet out the door.
  • ndev β€” pointer to the net_device structure 🫢 the network device she's doing all this for.

⭐ RETURN ⭐

  • NETDEV_TX_OK β€” when it goes off without a hitch, or any non space errors πŸ‘‘
  • NETDEV_TX_BUSY β€” when there's no free element available in the TX skb ring buffer 😭 like the queue is full, she's booked and busy, try again later.

πŸ”₯ DESCRIPTION πŸ”₯

Okay so this function gets invoked to initiate transmission β€” main character energy fr fr. πŸ’…

Here's the vibe: she sets the skbs, registers the dma callback API, and submits the dma transaction. That's the whole arc, no cap ✨

And additionally β€” plot twist β€” if checksum offloading is supported, she populates the AXI Stream Control fields with appropriate values 🧚 girl is thorough, she does the extra credit.


πŸ‘‘ SEE ALSO πŸ‘‘

First up, the kernel file herself: ./drivers/net/ethernet/xilinx/xilinx_axienet_main.c πŸ“

And now the whole friend group, no one left out, periodt πŸ’–

axienet_dma_in32(9), axienet_dma_bd_release(9), axienet_calc_cr(9), axienet_coalesce_params(9), axienet_dma_start(9), axienet_dma_bd_init(9), axienet_set_mac_address(9), netdev_set_mac_address(9), axienet_set_multicast_list(9), axienet_setoptions(9), axienet_dma_stop(9), axienet_device_reset(9), axienet_free_tx_chain(9), axienet_check_tx_bd_space(9), axienet_dma_tx_cb(9), axienet_tx_poll(9), axienet_start_xmit(9), axienet_dma_rx_cb(9), axienet_rx_poll(9), axienet_tx_irq(9), axienet_rx_irq(9), axienet_eth_irq(9), axienet_rx_submit_desc(9), axienet_init_dmaengine(9), axienet_init_legacy_dma(9), axienet_open(9), axienet_stop(9), axienet_change_mtu(9), axienet_poll_controller(9), axienet_ethtools_get_drvinfo(9), axienet_ethtools_get_regs_len(9), axienet_ethtools_get_regs(9), axienet_ethtools_get_pauseparam(9), axienet_ethtools_set_pauseparam(9), axienet_update_coalesce_rx(9), axienet_dim_coalesce_count_rx(9), axienet_rx_dim_work(9), axienet_update_coalesce_tx(9), axienet_ethtools_get_coalesce(9), axienet_ethtools_set_coalesce(9), axienet_dma_err_handler(9), axienet_probe(9) 🌈


ngl bestie, iykyk β€” if you're here you're already deep in the Xilinx ethernet driver and I'm obsessed for you 🫢

And that's the whole page!! Signing off from ./drivers/net/ethernet/xilinx, dated October 2026 β€” take care of her, she's iconic πŸ’œβœ¨

πŸ“¦ where this page comes from