GUC MMIO BASED COMMUNICATION(9)

💅 GuC MMIO based communication 💅

okay so welcome to the Kernel API Manual bestie, this page is literally all about GuC MMIO based communication and it's giving very "low level but make it cute" ✨

🎀 the whole vibe (aka what this actually is) 🎀

The MMIO based communication between Host and GuC relies on special hardware registers — and the format of those registers could be defined by the software, which is why they're called scratch registers 🦋

Each MMIO based message — and yes that's both Host to GuC (H2G) and GuC to Host (G2H) messages — gets written directly into those scratch registers. its maximum length depends on how many scratch registers are available, no cap 🫶

For Gen9+, there are 16 software scratch registers at 0xC180-0xC1B8, but ngl no H2G command takes more than 4 parameters, and the GuC firmware itself uses a 4-element array to store the H2G message 🔥

For Gen11+, there are additional 4 registers at 0x190240-0x19024C, which — regardless of their lower count — are preferred over the legacy ones 👑

The MMIO based communication is mainly used during the driver initialization phase, to setup the CTB based communication_ that will be used afterwards 🌸

✨ SEE ALSO ✨

• Kernel file ./drivers/gpu/drm/xe/abi/guc_communication_mmio_abi.h 📄
• MMIO
• HXG Message(9)

and that's the whole page bestie, we ate and left no crumbs 💅 mwah 💖

signing off from ./drivers/gpu/drm/xe/abi — dated October 2026, and yeah the header/footer both say GuC MMIO bas...ommunication(9) because truncation is iconic like that 😭