GSI REGISTERS(9)

✨ GSI Registers(9) 💅

okay bestie, welcome to the Kernel API Manual page for GSI Registers(9) — we’re decoding the "gsi" address space together, and yes, it’s giving hardware-nerd main character energy. 🎀

GSI registers live inside the "gsi" address space defined by Device Tree. The offset of each register within that space is specified by the symbols defined below. The GSI address space gets mapped into virtual memory space in gsi_init. And important vibe check: all GSI registers are 32 bits wide. 💖

Each register type is duplicated for a number of instances of something — iconic, honestly. For example, every GSI channel has its own set of registers defining its configuration. The offset to a channel’s set of registers is computed based on a "base" offset plus an additional "stride" amount computed from the channel’s ID. For such registers, the offset is computed by a function-like macro that takes a parameter used in the computation. slay. ✨

Then we got the parameter lore:

• The offset of a register dependent on execution environment is computed by a macro supplied a parameter "ee". The "ee" value is a member of the gsi_ee_id enumerated type. 🧚
• The offset of a channel register is computed by a macro supplied a parameter "ch". The "ch" value is a channel id whose maximum value is 30 (though the actual limit is hardware-dependent). 🔥
• The offset of an event register is computed by a macro supplied a parameter "ev". The "ev" value is an event id whose maximum value is 15 (though the actual limit is hardware-dependent). ⭐

👀 SEE ALSO 👀

Kernel file ./drivers/net/ipa/gsi_reg.h: enum gsi_irq_type_id(9), gsi_reg(9), gsi_reg_init(9), gsi_reg_exit(9). Go read those next, bestie — iykyk. 💜

xoxo, huge kiss from the ./drivers/net/ipa corner of the kernel, dated October 2026. 💅🫶