DisplayPort...capabilities(9)

📦 version 7.3.1, in nixpkgs unstable

ok so this is a page from the Kernel API Manual, section 9, and bestie, it's literally all about how the Intel DP link caps API keeps track of which DisplayPort link configurations a DP encoder and its attached connectors support and are allowed to use ✨

It also hands you the helper functions to iterate over those allowed configurations and to constrain them — by filtering them, disabling them, or limiting them to maximum link parameters. That's the whole vibe 🎀

🔒 Locking 🔒

okay so hear me — all accesses to this API have to be serialized. No cap. There is exactly one exception:

  • intel_dp_link_caps_get_max_limits — this one allows lockless lookup 👑
⚠️ but be careful babe, those lockless lookups may observe an out-of-sync struct intel_dp_link_config tuple — i.e. a rate from one state and a lane count from another 😭

The Intel i915/xe drivers keep that serialization promise by holding drm_mode_config.connection_mutex and, while holding the lock, waiting for any pending asynchronous atomic commits. And that's also what lets you use the API from the tails of asynchronous atomic commits, which literally cannot hold the lock 🫶

The link configuration iterators can iterate the allowed configurations during modeset configuration selection or link training fallback handling in a configurable order ✨

That iteration order can depend on:

  • connector type (eDP, DP SST, DP MST)
  • modeset-specific conditions or driver policies — things like DSC vs. non-DSC modes, power saving vs. better user experience, or policy changes after a link training failure 💫

The configurations exposed via the iterators can be additionally constrained in these ways:

  • Filtered for a given modeset based on modeset-specific conditions. Examples include driver policies preferring power saving or better user experience, post-link training failure preference changes, or sink automated test requests limiting the usable configurations.
  • Disabled permanently for the connected sink. Reasons to disable a configuration include a link training failure for a given configuration, or a driver workaround preventing the use of a particular configuration.
  • Limited via a maximum link rate and lane count. For example, after a link training failure, subsequent modesets may be limited to configurations at or below the failed parameters.
💀 real talk: this mechanism exists for backward compatibility only. Eventually it will be removed in favor of relying solely on individually disabled configurations, as described above. So don't get too attached, iykyk.

📖 Terminology 📖

  • Common link capabilities (or common caps) — the link rates and maximum lane count supported by both the source and the sink, i.e. the intersection of their respective capabilities 🤝
  • Supported configurations — all configurations defined by the common link capabilities' link rates and maximum lane count.
  • Disabled configurations — supported configurations disabled via this API 🙈
  • Enabled configurations — supported configurations that are not disabled.
  • Forced configurations — enabled configurations forced via forced link parameter debugfs entries.
  • Allowed configurations — the enabled configurations, or if forcing is in effect the forced configurations, constrained by a maximum rate and lane count set via the API.

👀 SEE ALSO 👀

Kernel file ./drivers/gpu/drm/i915/display/intel_dp_link_caps.c plus the whole squad:

ok that's the whole page bestie, go forth and configure your links 💖 this cutie came straight out of ./drivers/gpu/drm/i915/display, dated October 2026, from the Kernel API Manual — and honestly? iconic. periodt 🦋🌸

📦 where this page comes from