DMC FLIP QUEUE(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… DMC Flip Queue πŸ’…

okay so bestie, this is the DMC Flip Queue(9) page from the Kernel API Manual, and it's literally serving ring-buffer-in-firmware realness. πŸŽ€

A flip queue is a ring buffer implemented by the pipe DMC firmware. The driver inserts entries into the queues to be executed by the pipe DMC at a specified presentation timestamp (PTS). No cap, that's the whole vibe. ✨

Each pipe DMC provides several queues:

  • 1 general queue β€” two DSB buffers executed per entry πŸ¦‹
  • 3 plane queues β€” one DSB buffer executed per entry 🌸
  • 1 fast queue β€” deprecated πŸ‘€

🌈 SEE ALSO 🌈

Kernel file ./drivers/gpu/drm/i915/display/intel_flipq.c β€” go read it, iykyk πŸ“–πŸ’…


xoxo, your kernel bestie πŸ’– β€” straight from ./drivers/gpu/drm/i915/display, dated October 2026, and yes, it's DMC Flip Queue(9). periodt. πŸ‘‘

πŸ“¦ where this page comes from