DALSMC_MSG_T...ableSmu2Dram(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… DALSMC_MSG_T...ableSmu2Dram(9) β€” Kernel API Manual πŸ’…

okay bestie, welcome to the Kernel API Manual for DALSMC_MSG_T...ableSmu2Dram(9) β€” yes the title is truncated with ... because apparently even the kernel devs ran out of screen width, and honestly? iconic behavior. πŸŽ€


✨ NAME ✨

  • DALSMC_MSG_TransferTableSmu2Dram β€” transfers a PMFW table into DRAM. Slay, data goes in. πŸ’–
  • DALSMC_MSG_TransferTableDram2Smu β€” transfers a DRAM buffer into PMFW. And the reverse, we love a two-way street. πŸ¦‹

🌸 SYNOPSIS 🌸

DALSMC_MSG_TransferTableSmu2Dram

no cap, that's the whole synopsis up there. short and confident, main character energy fr fr. πŸ‘‘


πŸ’œ DESCRIPTION πŸ’œ

okay so both directions use the same argument layout β€” one layout to rule them all, we love efficiency. 🫢

but here's the catch, bestie: the DRAM address must be set beforehand 😭. AddrLow / AddrHigh are the GPU MC address bits [31:0] / [63:32]. like, set them first. before. don't come at it unprepared. πŸ™ˆ

πŸ¦‹ the supported tables, per direction

  • Smu2Dram supported tables: TABLE_DAL_INIT β€” that's DPM clocks + UTM QoS + memory config. a whole little bundle, highkey a lot going on. ✨
  • Dram2Smu supported tables: TABLE_SOC_UTM β€” a debug override of UTM QoS parameters. lowkey niche but we respect it. πŸ“

πŸŽ€ the request fields

  • TableId β€” table identifier (the TABLE_* defines below).
  • AddrLow β€” GPU MC address bits [31:0] of the destination/source buffer.
  • AddrHigh β€” GPU MC address bits [63:32] of the destination/source buffer.

⭐ the response

  • (none beyond result code) β€” that's literally it. no extra tea, you just get your result code back and you move on. πŸ’€

🌈 SEE ALSO 🌈

like the whole friend group showed up to the function-call party πŸ§šπŸ’œ


ok and one tiny vibe-check footnote bestie: this page lives at ./drivers/gpu/drm/amd/display/..., it's dated October 2026, and it's part of the same Kernel API Manual whose name is literally DALSMC_MSG_T...ableSmu2Dram(9). periodt. πŸ’…πŸ”₯πŸ‘‘
πŸ“¦ where this page comes from