CLOCK GENERATED BY PLL, RATE SET AND ENABLED BY BOOTLOADER(9)

πŸ“¦ version 7.3.1, in nixpkgs unstable

πŸ’… Clock Generated by PLL, rate set and enabled by bootloader(9) πŸŽ€

okay bestie, welcome to the Kernel API Manual β€” yes, that's the whole vibe, we're doing kernel clock lore today πŸ’–

So like, this page is about a clock that the PLL generates, and the rate is set and enabled by the bootloader. Iconic behaviour, honestly. The bootloader did the work before you even showed up. main character energy ✨


🌸 Traits of this clock (read them, they're important)

  • prepare β€” clk_(un)prepare only ensures the parent is (un)prepared. that's it, that's the whole job 🫢
  • enable β€” clk_enable / clk_disable only ensures the parent is enabled. no extra credit, no overachieving πŸ’…
  • rate β€” the rate is fixed. there is no clk_set_rate support. nope, not happening, don't ask 😭
  • parent β€” the parent is fixed. there is no clk_set_parent support. it's committed to its relationship, unlike some clocks πŸ”₯

✨ SEE ALSO ✨

Kernel file: ./drivers/clk/st/clkgen-pll.c β€” go read it, iykyk πŸ’œ


and that's the tea, bestie πŸ“ this little masterpiece lives at ./drivers/clk/st, dated October 2026 β€” slay, go forth and clock responsibly πŸ‘‘πŸ’–

πŸ“¦ where this page comes from