CTB DESCRIPTOR(9)

💖 CTB Descriptor(9) 💖

okay bestie, this page comes straight from the Kernel API Manual, and it’s literally the layout cheat sheet for the CTB Descriptor — every bit stays exactly where it belongs, no cap.

✨ CTB Descriptor ✨

the way this descriptor is laid out is lowkey iconic. here’s the whole bit-by-bit breakdown, and yes, we’re keeping every single detail:

• Row 0, bits 31:0 — HEAD — offset (in dwords) to the last dword that was read from the CT Buffer. It can only be updated by the receiver.
• Row 1, bits 31:0 — TAIL — offset (in dwords) to the last dword that was written to the CT Buffer. It can only be updated by the sender.
• Row 2, bits 31:0 — STATUS — status of the CTB:
  • GUC_CTB_STATUS_NO_ERROR = 0 (normal operation)
  • GUC_CTB_STATUS_OVERFLOW = 1 (head/tail too large)
  • GUC_CTB_STATUS_UNDERFLOW = 2 (truncated message)
  • GUC_CTB_STATUS_MISMATCH = 4 (head/tail modified)
• Row ... — RESERVED = MBZ
• Row 15, bits 31:0 — RESERVED = MBZ

fr fr, MBZ is just sitting there being reserved — don’t touch it, bestie 💅

👀 SEE ALSO 👀

• Kernel file ./drivers/gpu/drm/xe/abi/guc_communication_ctb_abi.h
• CT Buffer(9)
• CTB Message(9)
• CTB HXG Message(9)
• CTB based communication(9)

and that’s the whole CTB Descriptor vibe 🫶 — brought to you by source/version ./drivers/gpu/drm/xe/abi, dated October 2026. slay ✨