CTB BLOB(9)

💖 CTB Blob 💖

okay so bestie, this page is from the Kernel API Manual, and it's literally all about the CTB Blob. ✨ We're keeping every detail, no cap.

We allocate a single blob to hold both CTB Descriptors and buffers:

offset   contents                                   size
0x0000   H2G CTB Descriptor (send)
0x0800   G2H CTB Descriptor (recv)
0x1000   H2G CT Buffer (send)                        n*4K
0x1000   G2H CT Buffer (recv)                        m*4K + n*4K

Size of each CT Buffer must be a multiple of 4K. 💅 We don't expect too many messages in flight at any time, unless we are using the GuC submission. In that case each request requires a minimum 2 dwords, which gives us a maximum 256 queue'd requests. Hopefully this is enough space to avoid backpressure on the driver. We increase the size of the receive buffer (relative to the send) to ensure a G2H response CTB has a landing spot. 🫶

🔭 SEE ALSO 🔭

Kernel file ./drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c

• intel_guc_ct_init_early(9)
• intel_guc_ct_init(9)
• intel_guc_ct_fini(9)
• intel_guc_ct_enable(9)
• intel_guc_ct_disable(9)
• wait_for_ct_request_update(9)

mwah 💋 — this page lives in ./drivers/gpu/drm/i915/gt/uc, dated October 2026, and it's CTB Blob(9). periodt. 🌈