PCI(4)
π NAME π
okay bestie, welcome to pci β the generic PCI bus driver manual page, aka PCI(4) in the Kernel Interfaces Manual. this is the one you've been waiting for. π
β¨ SYNOPSIS β¨
so like, if you wanna bake the PCI bus driver into your kernel, you drop this exact line into your kernel configuration file:
device pci
and if you also want Single Root I/O Virtualization (SR-IOV) support compiled in, add:
options PCI_IOV
and for native PCI-express HotPlug support, add:
options PCI_HP
three little lines, three big vibes. π
π¦ DESCRIPTION π¦
ngl, the pci driver is doing a LOT. it provides support for PCI devices in the kernel, plus limited access to PCI devices for userland. like, it's giving main character energy on your motherboard fr fr.
here's the tea: the pci driver hands you a /dev/pci character device. userland programs can use it to read and write PCI configuration registers. they can also use it to pull a whole list of every PCI device in the system, or just the ones that match whatever patterns you want. iconic. πΈ
β οΈ okay so this part is important and I need you to actually read it: because thepcidriver gives you a write interface for PCI configuration registers, system administrators should exercise caution when granting access to thepcidevice. if it's used improperly, this driver can let userland applications crash a machine or cause data loss. no cap. be careful who you give the keys to. π
and now the lore of what it actually does in the kernel β the pci driver implements the PCI bus in the kernel. it:
- enumerates any devices on the PCI bus and gives PCI client drivers the chance to attach to them π
- assigns resources to children, when the BIOS does not π
- takes care of routing interrupts when necessary β‘
- reprobes the unattached PCI children when PCI client drivers are dynamically loaded at runtime π
- and it also includes support for PCI-PCI bridges, various platform-specific Host-PCI bridges, and basic support for PCI VGA adapters π¨
it's a whole multitasking queen.
π IOCTLS π
these are the ioctl(2) calls the pci driver supports, and they're all defined in the header file <sys/pciio.h>. let's go one by one, bestie.
PCIOCGETCONFβ thisioctl(2)takes apci_conf_iostructure. it lets you retrieve info on all PCI devices in the system, or on PCI devices matching patterns you supply. the call may seterrnoto any value specified in eithercopyin(9)orcopyout(9). and thepci_conf_iostructure is made up of a bunch of fields, so let's get into it:pat_buf_lenβ the length, in bytes, of the buffer filled with user-supplied patterns. πnum_patternsβ the number of user-supplied patterns. π’patternsβ pointer to a buffer filled with user-supplied patterns.patternsis a pointer tonum_patternspci_match_confstructures. and thepci_match_confstructure consists of these elements:pc_selβ PCI domain, bus, slot and function.pd_nameβ PCI device driver name.pd_unitβ PCI device driver unit number.pc_vendorβ PCI vendor ID.pc_deviceβ PCI device ID.pc_classβ PCI device class.flagsβ the flags describe which of the fields the kernel should match against. a device must match all specified fields in order to be returned. the match flags are enumerated in thepci_getconf_flagsstructure. hopefully the flag values are obvious enough that they do not need to be described in detail. π€·βοΈ (yes that's literally what the page says, I'm not editorializing here)
match_buf_lenβ length of the matches buffer allocated by the user to hold the results of thePCIOCGETCONFquery. π¦num_matchesβ number of matches returned by the kernel. β¨matchesβ buffer containing matching devices returned by the kernel. the items in this buffer are of typepci_conf, which consists of the following items:pc_selβ PCI domain, bus, slot and function.pc_hdrβ PCI header type.pc_subvendorβ PCI subvendor ID.pc_subdeviceβ PCI subdevice ID.pc_vendorβ PCI vendor ID.pc_deviceβ PCI device ID.pc_classβ PCI device class.pc_subclassβ PCI device subclass.pc_progifβ PCI device programming interface.pc_revidβ PCI revision ID.pd_nameβ driver name.pd_unitβ driver unit number.
offsetβ this is passed in by the user to tell the kernel where it should start traversing the device list. the value passed out by the kernel points to the record immediately after the last one returned. you can pass the value returned by the kernel in subsequent calls to thePCIOCGETCONFioctl. and if you don't intend to use the offset, it must be set to zero. π«Άgenerationβ PCI configuration generation. this value only needs to be set if the offset is set. the kernel compares the current generation number of its internal device list to the generation you passed in, to figure out whether its device list has changed since you last called thePCIOCGETCONFioctl. if the device list has changed, a status ofPCI_GETCONF_LIST_CHANGEDgets passed back. πstatusβ the status tells you the disposition of your request for a device list. the possible status values are:PCI_GETCONF_LAST_DEVICEβ this means there are no more devices in the PCI device list matching the specified criteria after the ones returned in thematchesbuffer. πPCI_GETCONF_LIST_CHANGEDβ this status tells you the PCI device list has changed since your last call to thePCIOCGETCONFioctl, and you must reset theoffsetandgenerationto zero to start over at the beginning of the list. πPCI_GETCONF_MORE_DEVSβ this tells you your buffer was not large enough to hold all of the remaining devices in the device list that match your criteria. π¬PCI_GETCONF_ERRORβ this indicates a general error while servicing your request. if thepat_buf_lenis not equal tonum_patternstimessizeof(struct pci_match_conf),errnowill be set toEINVAL. π
PCIOCREADβ thisioctl(2)reads the PCI configuration registers specified by the passed-inpci_iostructure. thepci_iostructure consists of the following fields:pi_selβ apciselstructure which specifies the domain, bus, slot and function you'd like to query. if the specific bus is not found,errnowill be set toENODEVand-1returned from the ioctl. π«pi_regβ the PCI configuration registers you'd like to access.pi_widthβ the width, in bytes, of the data you'd like to read. this value may be either1,2, or4. 3-byte reads and reads larger than 4 bytes are not supported. if an invalid width is passed,errnowill be set toEINVAL. β οΈpi_dataβ the data returned by the kernel. π₯
PCIOCWRITEβ thisioctl(2)lets you write to the PCI configuration registers specified in the passed-inpci_iostructure. thepci_iostructure is described above. the limitations on data width described for reading registers, above, also apply to writing PCI configuration registers. βοΈ (and remember that whole warning about crashing machines? yeah, this is the one. π)PCIOCATTACHEDβ thisioctl(2)lets you query whether a driver is attached to the PCI device specified in the passed-inpci_iostructure. thepci_iostructure is described above, however, thepi_regandpi_widthfields are not used. the status of the device is stored in thepi_datafield. a value of0indicates no driver is attached, while a value larger than0indicates that a driver is attached. π«Ά
πΎ PCIOCBARMMAP
okay so this one is the glow-up: it lets userspace processes mmap(2) the memory-mapped PCI BAR straight into their address space β¨. The input params and the results both ride in and out through the pci_bar_mmap structure, which has these fields:
uint64_t pbm_map_baseβ reports the established mapping base back to you, the caller π«Ά. But if thePCIIO_BAR_MMAP_FIXEDflag was specified, then you have to fill this field in before the call with the address you want the mapping at.uint64_t pbm_map_lengthβ reports the mapped length of the BAR, in bytes. Itsuint64_tvalue is always a multiple of machine pages, no exceptions bestie π .int64_t pbm_bar_lengthβ reports the length of the bar as exposed by the device.int pbm_bar_offβ reports the offset from the mapped base to the start of the first register in the bar.struct pcisel pbm_selβ should be filled before the call. Describes the device to operate on.int pbm_regβ the BAR index tommap.int pbm_flagsβ flags that augment the operation. See below π.int pbm_memattrβ the caching attribute for the mapping. Typical values areVM_MEMATTR_UNCACHEABLEfor control registers BARs, andVM_MEMATTR_WRITE_COMBININGfor frame buffers. A regular memory-like BAR should be mapped with theVM_MEMATTR_DEFAULTattribute.
Currently defined flags are:
PCIIO_BAR_MMAP_FIXEDβ the resulting mappings should be established at the address specified by thepbm_map_basemember, otherwise fail. Like, it's that address or nothing π€.PCIIO_BAR_MMAP_EXCLβ must be used together with. If the specified base contains already established mappings, the operation fails instead of implicitly unmapping them.PCIIO_BAR_MMAP_RWβ the requested mapping allows both reading and writing. Without the flag, a read-only mapping is established. Note that it is common for the device registers to have side-effects even on reads π so like, be careful.PCIIO_BAR_MMAP_ACTIVATEβ (Unimplemented) If the BAR is not activated, activate it in the course of mapping. Currently an attempt tommapan inactive BAR results in error.
β¨ LOADER TUNABLES β¨
Tunables can be set at the loader(8) prompt before booting the kernel, or stored in loader.conf(5) π. The current value of these tunables can be examined at runtime via sysctl(8) nodes of the same name. Unless otherwise specified, each of these tunables is a boolean that can be enabled by setting the tunable to a non-zero value.
hw.pci.clear_bars(Defaults to 0) β ignore any firmware-assigned memory and I/O port resources. This forces the PCI bus driver to allocate resource ranges for memory and I/O port resources from scratch π§Ό.hw.pci.clear_buses(Defaults to 0) β ignore any firmware-assigned bus number registers in PCI-PCI bridges. This forces the PCI bus driver and PCI-PCI bridge driver to allocate bus numbers for secondary buses behind PCI-PCI bridges.hw.pci.clear_pcib(Defaults to 0) β ignore any firmware-assigned memory and I/O port resource windows in PCI-PCI bridges. This forces the PCI-PCI bridge driver to allocate memory and I/O port resources for resource windows from scratch.
By default the PCI-PCI bridge driver will allocate windows that contain the firmware-assigned resources devices behind the bridge. In addition, the PCI-PCI bridge driver will suballocate from existing window regions when possible to satisfy a resource request. As a result, both hw.pci.clear_bars and hw.pci.clear_pcib must be enabled to fully ignore firmware-supplied resource assignments. (yes, both. the way they team up π€)
hw.pci.default_vgapci_unit(Defaults to -1) β by default, the first PCI VGA adapter encountered by the system is assumed to be the boot display device. This tunable can be set to choose a specific VGA adapter by specifying the unit number of the associatedvgapciXdevice.hw.pci.do_power_nodriver(Defaults to 0) β place devices into a low power state (D3) when a suitable device driver is not found. Can be set to one of the following values:3β powers down all PCI devices without a device driver.2β powers down most devices without a device driver. PCI devices with the display, memory, and base peripheral device classes are not powered down.1β similar to a setting of2except that storage controllers are also not powered down.0β all devices are left fully powered.
A PCI device must support power management to be powered down. Placing a device into a low power state may not reduce power consumption. (fr fr, it might not even help π)
hw.pci.do_power_resume(Defaults to 1) β place PCI devices into the fully powered state when resuming either the system or an individual device. Setting this to zero is discouraged as the system will not attempt to power up non-powered PCI devices after a suspend π.hw.pci.do_power_suspend(Defaults to 1) β place PCI devices into a low power state when suspending either the system or individual devices. Normally the D3 state is used as the low power state, but firmware may override the desired power state during a system suspend.hw.pci.enable_ari(Defaults to 1) β enable support for PCI-express Alternative RID Interpretation. This is often used in conjunction with SR-IOV.hw.pci.enable_io_modes(Defaults to 1) β enable memory or I/O port decoding in a PCI device's command register if it has firmware-assigned memory or I/O port resources. The firmware (BIOS) in some systems does not enable memory or I/O port decoding for some devices even when it has assigned resources to the device. This enables decoding for such resources during bus probe. BIOS said "not my problem" and this tunable said "bet" π.hw.pci.enable_msi(Defaults to 1) β enable support for Message Signalled Interrupts (MSI). MSI interrupts can be disabled by setting this tunable to0.hw.pci.enable_msix(Defaults to 1) β enable support for extended Message Signalled Interrupts (MSI-X). MSI-X interrupts can be disabled by setting this tunable to0.hw.pci.enable_pcie_hp(Defaults to 1) β enable support for native PCI-express HotPlug π₯.hw.pci.honor_msi_blacklist(Defaults to 1) β MSI and MSI-X interrupts are disabled for certain chipsets known to have broken MSI and MSI-X implementations when this tunable is set. It can be set to zero to permit use of MSI and MSI-X interrupts if the chipset match is a false positive.hw.pci.iov_max_config(Defaults to 1MB) β the maximum amount of memory permitted for the configuration parameters used when creating Virtual Functions via SR-IOV. This tunable can also be changed at runtime viasysctl(8).hw.pci.realloc_bars(Defaults to 0) β attempt to allocate a new resource range during the initial device scan for any memory or I/O port resources with firmware-assigned ranges that conflict with another active resource.hw.pci.usb_early_takeover(Defaults to 1 on amd64 and i386) β disable legacy device emulation of USB devices during the initial device scan. Set this tunable to zero to use USB devices via legacy emulation when using a custom kernel without USB controller drivers.hw.pci<D>.<B>.<S>.INT<P>.irqβ these tunables can be used to override the interrupt routing for legacy PCI INTx interrupts. Unlike other tunables in this list, these do not have correspondingsysctlnodes π«. The tunable name includes the address of the PCI device as well as the pin of the desired INTx IRQ to override:<D>β the domain (or segment) of the PCI device in decimal.<B>β the bus address of the PCI device in decimal.<S>β the slot of the PCI device in decimal.<P>β the interrupt pin of the PCI slot to override. One of βAβ, βBβ, βCβ, or βDβ.
The value of the tunable is the raw IRQ value to use for the INTx interrupt pin identified by the tunable name. Mapping of IRQ values to platform interrupt sources is machine dependent π§.
π DEVICE WIRING π
okay bestie, so you can wire the device unit at a given location with device.hints. Entries of the form hints.<name>.<unit>.at="pci<B>:<S>:<F>" or hints.<name>.<unit>.at="pci<D>:<B>:<S>:<F>" will force the driver name to probe and attach at unit unit for any PCI device found to match the specification, where:
<D>β the domain (or segment) of the PCI device in decimal. Defaults to0if unspecified. β¨<B>β the bus address of the PCI device in decimal.<S>β the slot of the PCI device in decimal.<F>β the function of the PCI device in decimal.
The code to do the matching requires an exact string match. Do not specify the angle brackets (<>) in the hints file. Wiring multiple devices to the same name and unit produces undefined results. π
π Examples π
Given the following lines in /boot/device.hints:
hint.nvme.3.at="pci6:0:0" hint.igb.8.at="pci14:0:0"
If there is a device that supports igb(4) at PCI bus 14 slot 0 function 0, then it will be assigned igb8 for probe and attach. Likewise, if there is an nvme(4) card at PCI bus 6 slot 0 function 0, then it will be assigned nvme3 for probe and attach. If another type of card is in either of these locations, the name and unit of that card will be the default names and will be unaffected by these hints. If other igb or nvme cards are located elsewhere, they will be assigned their unit numbers sequentially, skipping the unit numbers that have 'at' hints. slay. π
π FILES π
/dev/pciβ character device for thepcidriver. π«Ά
π SEE ALSO π
pciconf(8)β go look, bestie. π
π HISTORY π
The pci driver (not the kernel's PCI support code) first appeared in FreeBSD 2.2, and was written by Stefan Esser and Garrett Wollman. Support for device listing and matching was re-implemented by Kenneth Merry, and first appeared in FreeBSD 3.0. iconic behavior. π
π AUTHORS π
Kenneth Merry <ken@FreeBSD.org> β periodt. π
π BUGS π
It is not possible for users to specify an accurate offset into the device list without calling the PCIOCGETCONF at least once, since they have no way of knowing the current generation number otherwise. This probably is not a serious problem, though, since users can easily narrow their search by specifying a pattern or patterns for the kernel to match against. ngl, lowkey fine. π
This lil masterpiece came from the Debian crew, dated June 17, 2019, and it's the PCI(4) manual page. mwah πβ¨
π¦ where this page comes from
- debian bookworm: freebsd-manpages 12.2-1 Β· BSD-2-Clause-FreeBSD AND BSD-4-Clause
- debian trixie: freebsd-manpages 12.2-2 Β· BSD-2-Clause-FreeBSD AND BSD-4-Clause
- ubuntu jammy: freebsd-manpages 12.2-1 Β· BSD-2-Clause-FreeBSD AND BSD-4-Clause
- ubuntu noble: freebsd-manpages 12.2-1 Β· BSD-2-Clause-FreeBSD AND BSD-4-Clause
- ubuntu questing: freebsd-manpages 12.2-2
- ubuntu resolute: freebsd-manpages 12.2-2build1 Β· BSD-2-Clause-FreeBSD AND BSD-4-Clause
- ubuntu stonking: freebsd-manpages 12.2-2build1 Β· BSD-2-Clause-FreeBSD AND BSD-4-Clause
- Copyright (c) 1999 Kenneth D. Merry
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash on : a language model's rewrite of the original, under its terms